topic MKL14 - Problem changing system clock. in Kinetis Microcontrollers

MKL14 - Problem changing system clock.

brian_baker1 — Tue, 26 Jun 2018 19:16:12 GMT

On POR, I'm setting the system clock (MCGOUTCLK) to be the 4MHz High Speed Internal Reference clock. (ie. FBI mode with 4 MHz irc clock)

Using the following code:

-----------------------------------------------------------------

MCG_SC = 0;

MCG_C1 = MCG_C1_IREFS_MASK|MCG_C1_IRCLKEN_MASK;
MCG_C1 |= (1 << MCG_C1_CLKS_SHIFT);

while(MCG_S & (MCG_S_CLKST_MASK|MCG_S_IREFST_MASK) != (MCG_S_CLKST_MASK|MCG_S_IREFST_MASK));

MCG_C2 = MCG_C2_IRCS_MASK;

while((MCG_S & MCG_S_IRCST_MASK) != MCG_S_IRCST_MASK);

-----------------------------------------------------------------

Most of the time this is working. But sometimes, on POR, the frequency is much faster. It's like the POR default clock (20.9 MHz) is still set.

I'm working on trying to get the system clock output so I can see the frequency when it fails.

Is there something I'm missing? Is there some other status bit I need to be checking?

Thanks.

Re: MKL14 - Problem changing system clock.

Robin_Shen — Wed, 27 Jun 2018 09:14:20 GMT

Hi Brian,

Please refer the fei_fbi() function in mcg.c file. This file can be found in KL25_SC.exe.(...\KL25 Sample Code\kl25_sc_rev10\klxx-sc-baremetal\src\drivers\mcg)

I have also attached the mcg files here.

SIM_SOPT2[CLKOUTSEL] can be use to output internal clocks, you can select Bus clock output on the CLKOUT (PTC3) pin.

Best Regards,

Robin

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Re: MKL14 - Problem changing system clock.

mjbcswitzerland — Wed, 27 Jun 2018 11:05:31 GMT

Brian

Is this specific to POR or after every reset (watchdogs, external, etc.)? Usually the clock is configured after all reset types.

In the uTasker project one selects this clock mode with the define RUN_FROM_LIRC

The following code is then used:

    MCG_SC = MCG_SC_FCRDIV_1;                                            // no divide after fast clock (4MHz)
    MCG_C2 |= MCG_C2_IRCS;                                               // select fast internal reference clock (rather than slow one) for MCGIRCLK
    MCG_C1 = (MCG_C1_IREFSTEN | MCG_C1_IRCLKEN | MCG_C1_CLKS_INTERN_CLK);// enable and select 4MHz IRC clock source and allow it to continue operating in STOP mode
    while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST_INTERN_CLK) {       // wait until the 4MHz IRC source is selected
    }
    SIM_CLKDIV1 = (((SYSTEM_CLOCK_DIVIDE - 1) << 28) | ((BUS_CLOCK_DIVIDE - 1) << 16)); // set system and bus clock dividers
    MCG_C2 |= MCG_C2_LP;                                                 // disable FLL in bypass mode‍‍‍‍‍‍‍

Regards

Mark