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    <title>topic Re: K60 power up rise time in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-power-up-rise-time/m-p/229542#M4850</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi FabioPacio,&lt;/P&gt;&lt;P&gt;I do not see that specific specification but will continue to look.&lt;/P&gt;&lt;P&gt;The Kinetis Peripheral Module Quick Reference (KQRUG.pdf) Rev 2 has a power domain section talking about filtering the power supply.&amp;nbsp; I assume that filtering somewhat slows the power rail rise time.&lt;/P&gt;&lt;P&gt;The data sheet (K60P144M100SF2V2.pdf Rev3) section 5.2.4 has following:&lt;/P&gt;&lt;P&gt; &lt;span class="lia-inline-image-display-wrapper" image-alt="ScreenHunter_28 Jul. 30 10.47.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/40129i81B388FFFF9D0095/image-size/large?v=v2&amp;amp;px=999" role="button" title="ScreenHunter_28 Jul. 30 10.47.gif" alt="ScreenHunter_28 Jul. 30 10.47.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd also recommend comparing your schematics to the TWR-K60D100M schematics (&lt;A href="http://www.freescale.com/tower"&gt;www.freescale.com/tower&lt;/A&gt;).&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 Jul 2013 15:49:16 GMT</pubDate>
    <dc:creator>DavidS</dc:creator>
    <dc:date>2013-07-30T15:49:16Z</dc:date>
    <item>
      <title>K60 power up rise time</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-power-up-rise-time/m-p/229541#M4849</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;dear all,&lt;/P&gt;&lt;P&gt;My target board do not power up correctly, but i do not find any specification regarding the minimum or maximim rise time of VDD during power up.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can someone address me the specification?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;Fabio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jul 2013 08:16:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-power-up-rise-time/m-p/229541#M4849</guid>
      <dc:creator>FabioPacio</dc:creator>
      <dc:date>2013-07-30T08:16:24Z</dc:date>
    </item>
    <item>
      <title>Re: K60 power up rise time</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-power-up-rise-time/m-p/229542#M4850</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi FabioPacio,&lt;/P&gt;&lt;P&gt;I do not see that specific specification but will continue to look.&lt;/P&gt;&lt;P&gt;The Kinetis Peripheral Module Quick Reference (KQRUG.pdf) Rev 2 has a power domain section talking about filtering the power supply.&amp;nbsp; I assume that filtering somewhat slows the power rail rise time.&lt;/P&gt;&lt;P&gt;The data sheet (K60P144M100SF2V2.pdf Rev3) section 5.2.4 has following:&lt;/P&gt;&lt;P&gt; &lt;span class="lia-inline-image-display-wrapper" image-alt="ScreenHunter_28 Jul. 30 10.47.gif"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/40129i81B388FFFF9D0095/image-size/large?v=v2&amp;amp;px=999" role="button" title="ScreenHunter_28 Jul. 30 10.47.gif" alt="ScreenHunter_28 Jul. 30 10.47.gif" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'd also recommend comparing your schematics to the TWR-K60D100M schematics (&lt;A href="http://www.freescale.com/tower"&gt;www.freescale.com/tower&lt;/A&gt;).&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jul 2013 15:49:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K60-power-up-rise-time/m-p/229542#M4850</guid>
      <dc:creator>DavidS</dc:creator>
      <dc:date>2013-07-30T15:49:16Z</dc:date>
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