Kinetis MicrocontrollersのトピックRe: K82, limit access to GPIO ports by AIPS0 bridge

K82, limit access to GPIO ports by AIPS0 bridge

EugeneHiihtaja — Thu, 16 Aug 2018 08:32:01 GMT

Hello !

Do I understand right and by using AIPS0 peripheral bridge it is possible to limit access to PORTA-PORTAE

registers only ?

I can disable access with User privileges to PORTA-PORTE :

AIPS0->PACRJ = 0x44444444ul ; // Disable User access to Multiplexor Port A,B,C,D,E

But this settings dosn't have any effect to GPIOA-GPIOE ports.

As result, any task with User privileges can manipulate GPIO pins by using

GPIO_PinWrite(GPIOC, 8, 0) for example.

Is any way exists for limit access to GPIO ports ?

Regards,

Eugene

Re: K82, limit access to GPIO ports by AIPS0 bridge

victorjimenez — Fri, 17 Aug 2018 22:01:37 GMT

Hello Eugene,

In the reference manual you can see that the slots for the PORTA, PORTB, PORTC, PORTD and PORTE are 73 to 77 respectively.

And this slots are in the register PACRJ, so you are correct on this. But you are writing to the wrong bit, lets take as an example the PORT A, that is in the slot 73.

The slot 73 is located in the bits 24:27 of the register. In the next image you can see the equivalence of each bit for the slot 73.

If you want to enable the write protection you should write in the bit 25, but with the number you are passing (0x44444444) you are actually writing to the 26 bit instead of the 25. This goes for all the ports not only the PORT A.

This is why you cannot see any effect on the write protection.

Hope it helps!

Victor.

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Re: K82, limit access to GPIO ports by AIPS0 bridge

EugeneHiihtaja — Mon, 20 Aug 2018 08:48:17 GMT

Hi Victor !

My code, what is execute line GPIO_PinWrite(GPIOC, 8, 0) running with User privilidges. (I'm using FreeRTOS what utilize K82'z MPU).

I assume if access to PORTC configured in way :

AIPS0->PACRJ = xxx7xxxx; // PACR 75 [ 19 : 16]

Any access to PORTC/GPIOC addresses should cause BusFault. But it not happens.

bit - 18
SP3
Supervisor Protect
Determines whether the peripheral requires supervisor privilege level for accesses. When this field is set,
the master privilege level must indicate the supervisor access attribute, and the MPRx[MPLn] control field
for the master must be set. If not, access terminates with an error response and no peripheral access
initiates.
0 This peripheral does not require supervisor privilege level for accesses.
1 This peripheral requires supervisor privilege level for accesses.

bit - 17
WP3
Write Protect
Determines whether the peripheral allows write accesses. When this field is set and a write access is
attempted, access terminates with an error response and no peripheral access initiates.
0 This peripheral allows write accesses.
1 This peripheral is write protected. -> has effect for User and Supervisor accesses

bit - 16

TP3
Trusted Protect
Determines whether the peripheral allows accesses from an untrusted master. When this bit is set and an
access is attempted by an untrusted master, the access terminates with an error response and no
peripheral access initiates.
0 Accesses from an untrusted master are allowed.
1 Accesses from an untrusted master are not allowed.

And I start to think if AIPS protect PORTC ( 0x4004B000) only, but not GPIOC ( 0x400FF080).

Can it be so ?

My target is to disable manipulation with GPIO pins in code what running with User privileges.

Regards,

Eugene

Re: K82, limit access to GPIO ports by AIPS0 bridge

victorjimenez — Mon, 20 Aug 2018 15:22:34 GMT

Hello Eugene,

And I start to think if AIPS protect PORTC ( 0x4004B000) only, but not GPIOC ( 0x400FF080).
Can it be so ?

Yes, you are correct on this. If you go to the reference manual, chapter 64 you will see the following information.

The GPIO module does not have access protection because it is not connected to a peripheral bridge slot and is not protected by the MPU.

In the following image you can see that in fact the GPIO module is not connected neither to the MPU and the peripheral bridge.

Hope it helps!

Victor.

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