topic Re: Stop Mode K27F (FRDM K28 power_mode_switch example) in Kinetis Microcontrollers

Stop Mode K27F (FRDM K28 power_mode_switch example)

eldarfiring — Wed, 13 Jun 2018 08:29:18 GMT

Hi, I am using MCUXpresso 10.2 and SDK 2.3.1, FreeRTOS and tickless Idle. I am developing an application where I need to use the low power modes of Kinetis K27F. The processor will be idle for about 200 ms, then run maybe a couple of milliseconds and then back to sleep again. Using the FreeRTOS hooks configPRE_SLEEP_PROCESSING / configPOST_SLEEP_PROCESSING I have tested first with normal stop mode (deepsleep). I use LPTMR0 for tickless and LPTMR1 as wakeup timer.

But when waking up from deepsleep, I discovered that "STOPA" bit is always set (also before enter WFI) :

....

/* read back to make sure the configuration valid before enter stop mode */
(void)base->PMCTRL;
__DSB();
__WFI();
__ISB();

/* check whether the power mode enter Stop mode succeed */

if (base->PMCTRL & SMC_PMCTRL_STOPA_MASK)

{
return kStatus_SMC_StopAbort; // always return here
}

...

Then I tested using the "FRDM-K28 power_mode_switch" example which by the way does not work out-of-the box either (LPTMR0_IRQHandler is for some reason called constantly once enabled by NVIC...?). Is it a known problem?

Commenting out "NVIC_EnableIRQ(LPTMR0_IRQn);" I tested "C - Stop Mode" using switch SW3 as wake-up, but same thing happens as in my application, STOPA is always 1.

This is a bit confusing since K27 doc says :

3
STOPA
Stop Aborted
When set, this read-only status bit indicates an interrupt occured during the previous stop mode entry
sequence, preventing the system from entering that mode. This field is cleared by reset or by hardware at
the beginning of any stop mode entry sequence and is set if the sequence was aborted.
0 The previous stop mode entry was successful.
1 The previous stop mode entry was aborted.

So, that means it did not go to deepsleep? Does debugger attached change something ?

Re: Stop Mode K27F (FRDM K28 power_mode_switch example)

Hui_Ma — Fri, 15 Jun 2018 08:17:59 GMT

Hi,

You couldn't run the power_mode_switch example with FRDM-K28F board, right?

best regards,

Mike

Re: Stop Mode K27F (FRDM K28 power_mode_switch example)

eldarfiring — Fri, 15 Jun 2018 08:25:32 GMT

Hi,

Correct, I had to disable LPTMR0_IRQn in order to make it run (and use the switch option only). I tried this on both our own hardware and FRDM-K28. Running power_mode_switch example using SW3 on FRDM-28, the STOPA bit is always set when exiting deepsleep/stop mode.

Best Regards,

Eldar

Re: Stop Mode K27F (FRDM K28 power_mode_switch example)

Hui_Ma — Mon, 25 Jun 2018 05:37:36 GMT

Hi Eldar,

Sorry for the later reply.

I couldn't regenerate your mentioned issue with FRDM-K28F board with MCUXpresso SDK [power_mode_switch] demo.

I use below code to print the SMC_PMCTRL register value when wake up from VLPS or VLLS3 mode.

uint8_t reg;

reg = SMC->PMCTRL;
PRINTF("SMC_PMCTRL = 0x%x\r\n", reg);

I got below value when wake up from VLLS3 using SW3 button:

SMC_PMCTRL = 0x4

I got below value when wake up from VLPS using SW3 button:

SMC_PMCTRL = 0x2

I using the on board OpenSDA as debugger tool and run the code outside of debug mode.

Wish it helps.

Have a great day,
Mike

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Re: Stop Mode K27F (FRDM K28 power_mode_switch example)

eldarfiring — Mon, 25 Jun 2018 08:29:02 GMT

Hi,

Thanks a lot for investigating! I'm using Segger J-link probe directly attached to the K27F/K28F through the Cortex connector (I have modified FRDM-K28 in order to do this). When running the application from the debugger, the STOPA bit is always set when exiting stop mode. When I removed the j-link probe / debugger it works as expected. So I guess the debugger attached prevents it from going into deepsleep/stop mode. I verified this using some printf's as you did. Thanks again for you help.

Best Regards,

Eldar

Re: Stop Mode K27F (FRDM K28 power_mode_switch example)

Hui_Ma — Tue, 26 Jun 2018 01:07:59 GMT

Hi Eldar,

The external debugger connection will affect the Kinetis chip enter into a pseudo low power mode.

Please check here for more detailed info.

The AN4503 shows some tips about making low-power measurements on the bench:

In general, when we check if the chip enter into very low power mode, we will measure the chip current match with datasheet spec and disconnect external debugger at first.

Thank you for the attention.

Have a great day,
Mike