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    <title>Kinetis MicrocontrollersのトピックLinker file</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758289#M46201</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a project in IAR for MK10FN1M0xxx12. I suspect my linker file is not good. I took it from some project.&lt;/P&gt;&lt;P&gt;Can you look into it and tell me if it's good for MK10FN1M0xxx12?&lt;/P&gt;&lt;P&gt;If I compare it with the one provided with IAR - I see some differences. But I cant use the IAR linker cause the startup code uses&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = 0x00000000;&lt;BR /&gt;define exported symbol __VECTOR_RAM = 0x1fff0000;&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;&lt;/P&gt;&lt;P&gt;and I don't have these defines in the original IAR linker file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;actually it contradicts the memory table&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/24170iE583EE37FA566736/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;/*###ICF### Section handled by ICF editor, don't touch! ****/&lt;BR /&gt;/*-Editor annotation file-*/&lt;BR /&gt;/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */&lt;BR /&gt;/*-Specials-*/&lt;BR /&gt;define symbol __ICFEDIT_intvec_start__ = 0x00000000;&lt;BR /&gt;/*-Memory Regions-*/&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_end__&amp;nbsp;&amp;nbsp; = 0x00100000;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_start__ = 0x1FFF0410;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_end__&amp;nbsp;&amp;nbsp; = 0x20000000;&lt;BR /&gt;/*-Sizes-*/&lt;BR /&gt;define symbol __ICFEDIT_size_cstack__ = 0x2000;&lt;BR /&gt;define symbol __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp; = 0x400;&lt;BR /&gt;/**** End of ICF editor section. ###ICF###*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __region_RAM2_start__ = 0x20000000;&lt;BR /&gt;define symbol __region_RAM2_end__ = 0x20010000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = 0x00000000;&lt;BR /&gt;define exported symbol __VECTOR_RAM = 0x1fff0000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;&amp;nbsp;&amp;nbsp; &amp;nbsp;//0x2000FFF8;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __code_start__ = 0x00000410;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;BR /&gt;define region ROM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_ROM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_ROM_end__];&lt;BR /&gt;define region RAM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CSTACK&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_cstack__&amp;nbsp;&amp;nbsp; { };&lt;BR /&gt;define block HEAP&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; { };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;initialize manually { readwrite };&lt;BR /&gt;initialize manually { section .data};&lt;BR /&gt;initialize manually { section .textrw };&lt;BR /&gt;do not initialize&amp;nbsp; { section .noinit };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CodeRelocate { section .textrw_init };&lt;BR /&gt;define block CodeRelocateRam { section .textrw };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };&lt;BR /&gt;place at address mem:__code_start__ { readonly section .noinit };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in ROM_region&amp;nbsp;&amp;nbsp; { readonly, block CodeRelocate};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in RAM_region&amp;nbsp;&amp;nbsp; { readwrite, block CodeRelocateRam,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; block CSTACK, block HEAP };&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 06 Jun 2018 12:25:07 GMT</pubDate>
    <dc:creator>john71</dc:creator>
    <dc:date>2018-06-06T12:25:07Z</dc:date>
    <item>
      <title>Linker file</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758289#M46201</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a project in IAR for MK10FN1M0xxx12. I suspect my linker file is not good. I took it from some project.&lt;/P&gt;&lt;P&gt;Can you look into it and tell me if it's good for MK10FN1M0xxx12?&lt;/P&gt;&lt;P&gt;If I compare it with the one provided with IAR - I see some differences. But I cant use the IAR linker cause the startup code uses&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = 0x00000000;&lt;BR /&gt;define exported symbol __VECTOR_RAM = 0x1fff0000;&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;&lt;/P&gt;&lt;P&gt;and I don't have these defines in the original IAR linker file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;actually it contradicts the memory table&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/24170iE583EE37FA566736/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;/*###ICF### Section handled by ICF editor, don't touch! ****/&lt;BR /&gt;/*-Editor annotation file-*/&lt;BR /&gt;/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */&lt;BR /&gt;/*-Specials-*/&lt;BR /&gt;define symbol __ICFEDIT_intvec_start__ = 0x00000000;&lt;BR /&gt;/*-Memory Regions-*/&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_end__&amp;nbsp;&amp;nbsp; = 0x00100000;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_start__ = 0x1FFF0410;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_end__&amp;nbsp;&amp;nbsp; = 0x20000000;&lt;BR /&gt;/*-Sizes-*/&lt;BR /&gt;define symbol __ICFEDIT_size_cstack__ = 0x2000;&lt;BR /&gt;define symbol __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp; = 0x400;&lt;BR /&gt;/**** End of ICF editor section. ###ICF###*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __region_RAM2_start__ = 0x20000000;&lt;BR /&gt;define symbol __region_RAM2_end__ = 0x20010000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = 0x00000000;&lt;BR /&gt;define exported symbol __VECTOR_RAM = 0x1fff0000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;&amp;nbsp;&amp;nbsp; &amp;nbsp;//0x2000FFF8;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __code_start__ = 0x00000410;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;BR /&gt;define region ROM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_ROM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_ROM_end__];&lt;BR /&gt;define region RAM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CSTACK&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_cstack__&amp;nbsp;&amp;nbsp; { };&lt;BR /&gt;define block HEAP&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; { };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;initialize manually { readwrite };&lt;BR /&gt;initialize manually { section .data};&lt;BR /&gt;initialize manually { section .textrw };&lt;BR /&gt;do not initialize&amp;nbsp; { section .noinit };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CodeRelocate { section .textrw_init };&lt;BR /&gt;define block CodeRelocateRam { section .textrw };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };&lt;BR /&gt;place at address mem:__code_start__ { readonly section .noinit };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in ROM_region&amp;nbsp;&amp;nbsp; { readonly, block CodeRelocate};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in RAM_region&amp;nbsp;&amp;nbsp; { readwrite, block CodeRelocateRam,&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; block CSTACK, block HEAP };&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jun 2018 12:25:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758289#M46201</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2018-06-06T12:25:07Z</dc:date>
    </item>
    <item>
      <title>Re: Linker file</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758290#M46202</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please download the Kinetis 120MHz bare metal sample code from &lt;A href="https://www.nxp.com/webapp/sps/download/license.jsp?colCode=KINETIS_120MHZ_SC&amp;amp;Parent_nodeId=1322538641013716882290&amp;amp;Parent_pageType=product&amp;amp;Parent_nodeId=1322538641013716882290&amp;amp;Parent_pageType=product&amp;amp;Parent_nodeId=1322538641013716882290&amp;amp;Parent_pageType=product"&gt;here&lt;/A&gt;.&lt;BR /&gt;You could find the IAR linker config file located at below folder:&lt;BR /&gt;..\KINETIS_120MHZ_SC\build\iar\config files&lt;BR /&gt;Wish it helps.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Mike&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Jun 2018 06:56:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758290#M46202</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2018-06-07T06:56:30Z</dc:date>
    </item>
    <item>
      <title>Re: Linker file</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758291#M46203</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you Hui_Ma.&lt;/P&gt;&lt;P&gt;I took the linker file and the startup code exactly from this source. But i suspect it doesn't fit to MK10.&lt;/P&gt;&lt;P&gt;If I look at the original linker file from IAR (MK10xN1M_12.icf) there is some difference&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*###ICF### Section handled by ICF editor, don't touch! ****/&lt;BR /&gt;/*-Editor annotation file-*/&lt;BR /&gt;/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */&lt;BR /&gt;/*-Specials-*/&lt;BR /&gt;define symbol __ICFEDIT_intvec_start__ = 0x00000000;&lt;BR /&gt;/*-Memory Regions-*/&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;&lt;BR /&gt;define symbol __ICFEDIT_region_ROM_end__&amp;nbsp;&amp;nbsp; = 0x000fffff;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_start__ = 0x1fff0000;&lt;BR /&gt;define symbol __ICFEDIT_region_RAM_end__&amp;nbsp;&amp;nbsp; = 0x1fffffff;&lt;BR /&gt;/*-Sizes-*/&lt;BR /&gt;define symbol __ICFEDIT_size_cstack__ = 0x2000;&lt;BR /&gt;define symbol __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp; = 0x4000;&lt;BR /&gt;/**** End of ICF editor section. ###ICF###*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __region_RAM2_start__ = 0x20000000;&lt;BR /&gt;define symbol __region_RAM2_end__&amp;nbsp; = 0x2000ffff;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = 0x00000000;&lt;BR /&gt;define exported symbol __VECTOR_RAM = 0x1fff0000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __region_RAM2_end__ - 8;&amp;nbsp;&amp;nbsp; &amp;nbsp;//0x2000FFF8;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __FlashConfig_start__&amp;nbsp;&amp;nbsp; &amp;nbsp;= 0x00000400;&lt;BR /&gt;define symbol __FlashConfig_end__ &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;= 0x0000040f;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;BR /&gt;define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1)&amp;nbsp; to __ICFEDIT_region_ROM_end__];&lt;BR /&gt;define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CSTACK&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_cstack__&amp;nbsp;&amp;nbsp; { };&lt;BR /&gt;define block HEAP&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; with alignment = 8, size = __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; { };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;initialize by copy { readwrite };&lt;BR /&gt;do not initialize&amp;nbsp; { section .noinit };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in FlashConfig_region {section FlashConfig};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in ROM_region&amp;nbsp;&amp;nbsp; { readonly };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place in RAM_region&amp;nbsp;&amp;nbsp; { readwrite, block CSTACK, block HEAP };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All the sample projects are for K60-K70 may be for K10 it's different a bit?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Jun 2018 07:47:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758291#M46203</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2018-06-07T07:47:05Z</dc:date>
    </item>
    <item>
      <title>Re: Linker file</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758292#M46204</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Evgeny&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Both IAR files are correct; one is leaving space for vectors (although more than needed) at the start of SRAM and the other not (for use when interrupt vectors remain in Flash).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Possibly the SRAM_L in the user's guide is wrong since it starts physically at 0x1fff0000 and not at 0x1c000000 as stated (although the statement may be indicating something else, but not relevant for this case).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The same linker script file can be used for all Kinetis (K) parts with the same memory size.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM style="color: #0000ff;"&gt;uTasker developer and supporter (+5'000 hours experience on +60 Kinetis derivatives in +80 product developments)&lt;/EM&gt;&lt;BR /&gt;&lt;EM style="color: #0000ff;"&gt;&lt;SPAN&gt;Kinetis: &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.utasker.com%2Fkinetis.html" rel="nofollow" target="_blank"&gt;http://www.utasker.com/kinetis.html&lt;/A&gt;&lt;/EM&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Jun 2018 10:28:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758292#M46204</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2018-06-07T10:28:20Z</dc:date>
    </item>
    <item>
      <title>Re: Linker file</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758293#M46205</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks a lot!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Jun 2018 10:39:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Linker-file/m-p/758293#M46205</guid>
      <dc:creator>john71</dc:creator>
      <dc:date>2018-06-07T10:39:22Z</dc:date>
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