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    <title>Kinetis MicrocontrollersのトピックRe: K70 External DDR2 RAM Debugging</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225468#M4422</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The issue you met is due to the interrupt vector table is out of range. It should be relocated in a address from 0x00000080 to 0x3FFFFF80, but you put it started from &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;0x70000000. Please kindly refer to the following for details.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.PNG.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/12548iCF294A13A4BC8D07/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.PNG.png" alt="1.PNG.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;You may also refer to DUI0553A_cortex_m4_dgug.pdf for more details, which can be downloaded from &lt;A href="http://www.arm.com/"&gt;www.arm.com&lt;/A&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Hope that helps,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;B.R&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Kan&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Sep 2013 04:09:38 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2013-09-12T04:09:38Z</dc:date>
    <item>
      <title>K70 External DDR2 RAM Debugging</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225467#M4421</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Currently I'm using IAR IDE to do the debugging.&lt;/P&gt;&lt;P&gt;I'm using the macro file K70_MT47H64M16HR-3.mac from bare metal and the icf is something like below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_intvec_start__ = 0x70000000;&lt;/P&gt;&lt;P&gt;/*-Memory Regions-*/&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_ROM_start__&amp;nbsp;&amp;nbsp; = 0x70000000;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_ROM_end__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x7007FFFF;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; = 0x20000000;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_RAM_end__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x2000FFF0;&lt;/P&gt;&lt;P&gt;/*-Sizes-*/&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_size_cstack__&amp;nbsp;&amp;nbsp; = 0x00;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0;&lt;/P&gt;&lt;P&gt;/**** End of ICF editor section. ###ICF###*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_ROM_BASE = 0x10000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_ROM_SIZE = 0x00060000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_RAM_BASE = 0x10060000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_RAM_SIZE = 0x00020000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x60000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x1FFFF;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_DC_BASE&amp;nbsp;&amp;nbsp; = 0x60010000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLASH_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00000000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLASH_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00100000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_SRAM_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x20000000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_SRAM_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00010000;&lt;/P&gt;&lt;P&gt;define exported symbol __INIT&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x1FFF0000;&lt;/P&gt;&lt;P&gt;define exported symbol __UNCACHED_DATA_END&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x20020000;&lt;/P&gt;&lt;P&gt;/* The __SRAM_POOL does not exist in fact in the SRAMData target. It should be never referenced&lt;/P&gt;&lt;P&gt;** (runtime check ensures that SRAM pool = system pool) but it can be assigned. The symbol is defined in the vectors.c file.&lt;/P&gt;&lt;P&gt;*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLEXNVM_BASE = 0;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLEXNVM_SIZE = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE_ROM_START = 0x70000000;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE_RAM_START = __ICFEDIT_region_RAM_start__;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __DEFAULT_PROCESSOR_NUMBER = 1;&lt;/P&gt;&lt;P&gt;define exported symbol __DEFAULT_INTERRUPT_STACK_SIZE = 1024;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* mem_init writes a storeblock_struct at the end of kernel data, max size 32 bytes, so use 0x100 offset */&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __ICFEDIT_region_RAM_end__ - 0x100;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __KERNEL_DATA_END = __ICFEDIT_region_RAM_end__;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;/P&gt;&lt;P&gt;define region ROM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_ROM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_ROM_end__];&lt;/P&gt;&lt;P&gt;define region RAM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_RAM_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block KERNEL_DATA with alignment = 8 { section .kernel_data };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __FLASHX_SECT_SIZE = 0x1000;&lt;/P&gt;&lt;P&gt;define exported symbol __FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CFMPROTROM with size = 20 { section .cfmconfig };&lt;/P&gt;&lt;P&gt;define block FLASHX_POOL with alignment = __FLASHX_SECT_SIZE { section .flashx };&lt;/P&gt;&lt;P&gt;keep { section .cfmconfig };&lt;/P&gt;&lt;P&gt;keep { section .flashx };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;initialize by copy { readwrite };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .noinit };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .kernel_data };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .flashx };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .cfmconfig };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, block CFMPROTROM};&lt;/P&gt;&lt;P&gt;place in ROM_region { readonly, last block FLASHX_POOL };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_region_RAM_start__ { readwrite section .vectors_ram };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* each block/segment must be in one line (association to region) because I need kernel data start after other datas */&lt;/P&gt;&lt;P&gt;place in RAM_region&amp;nbsp;&amp;nbsp; { readwrite, last block KERNEL_DATA };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I successed load my code into ext ddr2 ram, but the PC register is not point to the boot.o address while should be 0x70000XXX, then the program is not running.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did I miss out something need to do?&lt;/P&gt;&lt;P&gt;Please advice.&lt;/P&gt;&lt;P&gt;Thankx&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Sep 2013 08:34:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225467#M4421</guid>
      <dc:creator>skteh</dc:creator>
      <dc:date>2013-09-11T08:34:33Z</dc:date>
    </item>
    <item>
      <title>Re: K70 External DDR2 RAM Debugging</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225468#M4422</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ，&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The issue you met is due to the interrupt vector table is out of range. It should be relocated in a address from 0x00000080 to 0x3FFFFF80, but you put it started from &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;0x70000000. Please kindly refer to the following for details.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="1.PNG.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/12548iCF294A13A4BC8D07/image-size/large?v=v2&amp;amp;px=999" role="button" title="1.PNG.png" alt="1.PNG.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;You may also refer to DUI0553A_cortex_m4_dgug.pdf for more details, which can be downloaded from &lt;A href="http://www.arm.com/"&gt;www.arm.com&lt;/A&gt;.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Hope that helps,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;B.R&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;Kan&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Sep 2013 04:09:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225468#M4422</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-09-12T04:09:38Z</dc:date>
    </item>
    <item>
      <title>Re: K70 External DDR2 RAM Debugging</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225469#M4423</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank for the reply.&lt;/P&gt;&lt;P&gt;I got it success go to the new boot.o address.&lt;/P&gt;&lt;P&gt;Now solving some initialization problem.&lt;/P&gt;&lt;P&gt;Thank you so much.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Sep 2013 08:00:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225469#M4423</guid>
      <dc:creator>skteh</dc:creator>
      <dc:date>2013-09-12T08:00:08Z</dc:date>
    </item>
    <item>
      <title>Re: K70 External DDR2 RAM Debugging</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225470#M4424</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Li,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This issue have been ignore until now.&lt;/P&gt;&lt;P&gt;Previously I failed to make it run in DDR2 RAM, due to project deadline, I handed-on the project with IntFlash and DDR2data setup.&lt;/P&gt;&lt;P&gt;Now, I have another project using this MK61FX512 and MQX, but my code is larger, so I need to looking into this issue again.&lt;/P&gt;&lt;P&gt;Currently I'm using MQX 4.2 and IAR 7.30, with refer to KINETIS_120MHZ_SC project, I modified the linker file like below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/*###ICF### Section handled by ICF editor, don't touch! ****/&lt;/P&gt;&lt;P&gt;/*-Editor annotation file-*/&lt;/P&gt;&lt;P&gt;/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */&lt;/P&gt;&lt;P&gt;/*-Specials-*/&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_intvec_start__ = 0x1fff0000;&lt;/P&gt;&lt;P&gt;/*-Memory Regions-*/&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_ROM_end__&amp;nbsp;&amp;nbsp; = 0x08FFFFFF;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_RAM_start__ = 0x71000000;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_region_RAM_end__&amp;nbsp;&amp;nbsp; = 0x7FFFFFF0;&lt;/P&gt;&lt;P&gt;/*-Sizes-*/&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_size_cstack__ = 0;&lt;/P&gt;&lt;P&gt;define symbol __ICFEDIT_size_heap__&amp;nbsp;&amp;nbsp; = 0;&lt;/P&gt;&lt;P&gt;/**** End of ICF editor section. ###ICF###*/&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_ROM_BASE = 0xA0000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_ROM_SIZE = 0x00000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_RAM_BASE = 0xA0000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_MRAM_RAM_SIZE = 0x00080000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_DDR2_RAM_BASE = 0x70000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_DDR2_RAM_SIZE = 0x08000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0xA0000000;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x1FFFF;&lt;/P&gt;&lt;P&gt;define exported symbol __EXTERNAL_LCD_DC_BASE&amp;nbsp;&amp;nbsp; = 0xA0010000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLASH_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00000000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLASH_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00100000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_SRAM_BASE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x1FFF1000;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_SRAM_SIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0x00020000;&lt;/P&gt;&lt;P&gt;define exported symbol __UNCACHED_DATA_END&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = __ICFEDIT_region_RAM_end__;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLEXNVM_BASE = 0;&lt;/P&gt;&lt;P&gt;define exported symbol __INTERNAL_FLEXNVM_SIZE = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE_ROM_START = 0x1fff0000;&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE_RAM_START = 0x1fff0000;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __DEFAULT_PROCESSOR_NUMBER = 1;&lt;/P&gt;&lt;P&gt;define exported symbol __DEFAULT_INTERRUPT_STACK_SIZE = 1024;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* mem_init writes a storeblock_struct at the end of kernel data, max size 32 bytes, so use 0x100 offset */&lt;/P&gt;&lt;P&gt;define exported symbol __BOOT_STACK_ADDRESS = __ICFEDIT_region_RAM_end__ - 0x100;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __KERNEL_DATA_END = __ICFEDIT_region_RAM_end__;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;/P&gt;&lt;P&gt;define region ROM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_ROM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_ROM_end__];&lt;/P&gt;&lt;P&gt;define region RAM_region&amp;nbsp;&amp;nbsp; = mem:[from __ICFEDIT_region_RAM_start__&amp;nbsp;&amp;nbsp; to __ICFEDIT_region_RAM_end__];&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block KERNEL_DATA with alignment = 8 { section .kernel_data };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define exported symbol __FLASHX_SECT_SIZE = 0x1000;&lt;/P&gt;&lt;P&gt;define exported symbol __FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;define block CFMPROTROM with size = 20 { section .cfmconfig };&lt;/P&gt;&lt;P&gt;define block FLASHX_POOL with alignment = __FLASHX_SECT_SIZE { section .flashx };&lt;/P&gt;&lt;P&gt;keep { section .cfmconfig };&lt;/P&gt;&lt;P&gt;keep { section .flashx };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;//initialize by copy { readwrite };&lt;/P&gt;&lt;P&gt;initialize manually { readwrite }; &lt;/P&gt;&lt;P&gt;initialize manually { section .data};&lt;/P&gt;&lt;P&gt;initialize manually { section .textrw };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .noinit };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .kernel_data };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .flashx };&lt;/P&gt;&lt;P&gt;do not initialize&amp;nbsp; { section .cfmconfig };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec, block CFMPROTROM };&lt;/P&gt;&lt;P&gt;place in ROM_region { readonly, last block FLASHX_POOL };&lt;/P&gt;&lt;P&gt;place at address mem:__INTERNAL_SRAM_BASE {section USB_BDT_Z, section .sram_pool };&lt;/P&gt;&lt;P&gt;//place at address mem:__ICFEDIT_region_RAM_start__ { readwrite section .vectors_ram };&lt;/P&gt;&lt;P&gt;place in ROM_region&amp;nbsp;&amp;nbsp; { readwrite, last block KERNEL_DATA };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Without using flashloader, I can download the ROM_region data, however the VECTOR_TABLE_ROM was not loader into 0x1FFF0000.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you know what's wrong?&lt;/P&gt;&lt;P&gt;If possible, can you create a MQX IAR project with successful debugging in DDR2 RAM, because my project due date is kinda near.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Feb 2016 07:31:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-External-DDR2-RAM-Debugging/m-p/225470#M4424</guid>
      <dc:creator>skteh</dc:creator>
      <dc:date>2016-02-18T07:31:09Z</dc:date>
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