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    <title>topic Re: K17 SPI with DMA - First byte incorrect in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713340#M43812</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joe,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Sorry for our later reply, I just take you question, now I will help you about this question.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; I have a question about your issue, what the SPI Slave you are using?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Did you test the SPI wave, whether the first SPI MISO data is 0x00 or 0xff? This is very important.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; If the SPI bus wave in the first MISO is 0x00, it is your code problem, I will help you check you code. I have test the SPI DMA in the KL series, it works OK.&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please also give me your SPI waveform with oscilloscope or logic analyzer.&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please also tell me the full name of your chip.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 27 Sep 2017 09:16:49 GMT</pubDate>
    <dc:creator>kerryzhou</dc:creator>
    <dc:date>2017-09-27T09:16:49Z</dc:date>
    <item>
      <title>K17 SPI with DMA - First byte incorrect</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713336#M43808</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am using a K17.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Spi is set up for 8 bit data, DMA moving the data.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My data coming in is a repeating sequence (for testing) --- FF 00 00 FF 00 00&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The first by in my receive buffer is 00 instead of FF. &amp;nbsp;It appears the DMA is getting signaled to read an empty SPI RCV register at the beginning of the trans fer process.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Before enabling the DMA transfer, I loop in the RCV status flag to make sure no data is available.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will present my code below.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can someone&amp;nbsp;identify my error -- thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SPI INIT function ......&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void Init_SPI(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SIM_SCGC4 |= SIM_SCGC4_SPI1_MASK; // turn clock on &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;PORTB-&amp;gt;PCR[16] = PORT_PCR_MUX(2); // SPI_MOSI&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;PORTD-&amp;gt;PCR[5] = PORT_PCR_MUX(2); // SPI_CLK&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;PORTD-&amp;gt;PCR[4] = PORT_PCR_MUX(2); // SPI_CS_PS0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI1_C1 =&amp;nbsp;SPI_C1_SPE_MASK | // module enabled&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI_C1_CPHA_MASK |&amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI_C1_CPOL_MASK; // clk idle HI&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI1_C2 = SPI_C2_RXDMAE_MASK; // set 8 bit data &lt;BR /&gt; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI1_C3 = 0;&lt;BR /&gt;}; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This function sets up DMA prior to the message packet arriving&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void Set_DMA0_For_SPI_Use(void)&lt;BR /&gt;{&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;volatile byte B;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI1_C2 = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;while(SPI1_S &amp;amp; SPI_S_SPRF_MASK)&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;{&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;B = SPI1_DL; // clears out out of sync condition&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;}&lt;BR /&gt; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;SPI1_C2 = SPI_C2_RXDMAE_MASK; &lt;BR /&gt; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMAMUX0_CHCFG0 = 0; // disable mux channel&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMAMUX0_CHCFG0 = 18; // SPI1 Rcv&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMAMUX0_CHCFG0 |= DMAMUX_CHCFG_ENBL_MASK;&lt;BR /&gt; &lt;BR /&gt; // check to make sure DONE is not set -- if it is -- no SPI operation&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;if(DMA_DSR_BCR0 &amp;amp; DMA_DSR_BCR_DONE_MASK) // we need to reset it&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DSR_BCR0 |= DMA_DSR_BCR_DONE_MASK;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA0_Flex_SPI = 1;&lt;BR /&gt; &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_SAR0 = (dword)&amp;amp;SPI1_DL;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DAR0 = (dword)SPI_IN;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DSR_BCR0 = Expected_Number_SPI_Bytes;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR0 = DMA_DCR_EINT_MASK | // enable interrupt at end of xfer&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_ERQ_MASK | // Enable Peripheral Request&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_CS_MASK | // Cycle Steal .. 1 transfer per spi request&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_SSIZE(1) | // 8 bit inc&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_DINC_MASK |&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_DSIZE(1) | // 8 bit&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_START_MASK | // dma request start process&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;DMA_DCR_D_REQ_MASK; // DMA hardware automatically clears the corresponding DCRn[ERQ] bit when the byte count register reaches 0.&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Above DMA_DAR0 is set to SPI_IN;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After the DMA interrupt fires -- the data at SPI_IN is a ZERO with the first real incoming data value starting at SPI_IN + 1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can someone please explain this behavior.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Joe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 25 Sep 2017 19:26:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713336#M43808</guid>
      <dc:creator>JHinkle</dc:creator>
      <dc:date>2017-09-25T19:26:54Z</dc:date>
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    <item>
      <title>Re: K17 SPI with DMA - First byte incorrect</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713337#M43809</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Let me ask my question a different way since I'm getting no replies with the first.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;K17 documentation states that a DMA transfer will take place when the SPI is enabled AND the SPI's&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;SPI_S_SPRF_MASK bit is set in the SPI's S register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;Before kicking off the process I'm making sure there is NO SPI activity and the&amp;nbsp;SPI_S_SPRF_MASK is clear - AND the packet I'm going to acquire has NOT started (I have addition digital handshake signals that guarantee&amp;nbsp;the transfer has not started)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;SO --- why is a DMA transfer cycle taking place when no data was acquired by the SPI?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;I have placed a bandage on the process by ignoring the first DMA transferred byte and adding one to the DMA count of what is expected. &amp;nbsp;That is a bandage since root cause it not know and the issue properly identified.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;The data transfer comes in packets every 25msec. Each packet contains the same number of bytes and the time to transmit the packet is 5 msec.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;The issue has to be with the code setting up the SPI and DMA (which I posted above) but I can't see it -- I'm hoping one of you can see it.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;Thanks in advance for any comment.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #51626f;"&gt;Joe&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Sep 2017 17:06:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713337#M43809</guid>
      <dc:creator>JHinkle</dc:creator>
      <dc:date>2017-09-26T17:06:24Z</dc:date>
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    <item>
      <title>Re: K17 SPI with DMA - First byte incorrect</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713338#M43810</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Joe&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I didn't notice anything in your code but I also had a strange behavior when using the PIT to trigger DMA. It is reported here: &lt;A href="https://community.nxp.com/thread/442382"&gt;https://community.nxp.com/thread/442382&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This was on a KL27, whereas the behavior was as expected on K devices (with slightly different PIT and different DMA controller).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I never worked out why the PIT would immediately trigger a DMA transfer when it hadn't fired yet - as if there were a "pending" DMA request that couldn't be cleared. Since I have used the same DMA code in various other applications without such an effect my conclusion was that it was more likely a problem with the trigger source rather than the DMA controller/DMA code itself. That is, something that can't be explained by studying the logic but instead something inherent and not documented, that needs to be respected/ worked around.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your issue may fall into a similar class. I haven't in fact ever used SPI slave Rx DMA on the K family so can't demonstrate it working as expected at the moment. If you don't find an actual error/explanation I may be able to try later this week, in order to possibly verify the behavior you find.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Sep 2017 17:55:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713338#M43810</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2017-09-26T17:55:13Z</dc:date>
    </item>
    <item>
      <title>Re: K17 SPI with DMA - First byte incorrect</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713339#M43811</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Mark:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your reply is along the lines I was thinking but I would rather have found root-cause, understood what was happening, and fixed it properly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As it is now, my buffer offset and one additional count to the data amount is working - and consistently providing the correct data.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unless a support Engineer from NXP can explain this behavior, I'll live with my bandage.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not going to mark your reply as the answer, which for now I think it is the best there is, in hopes NXP will respond.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks Mark.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Joe&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Sep 2017 18:58:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713339#M43811</guid>
      <dc:creator>JHinkle</dc:creator>
      <dc:date>2017-09-26T18:58:36Z</dc:date>
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    <item>
      <title>Re: K17 SPI with DMA - First byte incorrect</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713340#M43812</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joe,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Sorry for our later reply, I just take you question, now I will help you about this question.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; I have a question about your issue, what the SPI Slave you are using?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Did you test the SPI wave, whether the first SPI MISO data is 0x00 or 0xff? This is very important.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; If the SPI bus wave in the first MISO is 0x00, it is your code problem, I will help you check you code. I have test the SPI DMA in the KL series, it works OK.&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please also give me your SPI waveform with oscilloscope or logic analyzer.&lt;/P&gt;&lt;P&gt;&amp;nbsp; Please also tell me the full name of your chip.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Sep 2017 09:16:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K17-SPI-with-DMA-First-byte-incorrect/m-p/713340#M43812</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2017-09-27T09:16:49Z</dc:date>
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