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    <title>Kinetis MicrocontrollersのトピックRe: PIT-&amp;gt;PDB-&amp;gt;DMA</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708383#M43453</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok I solved the problem it was due to IDLY register, the IDLY is set to 0xFFFF by default and this is to large in my case, I simply set it to 0 and it works.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is the PDB code:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; SIM-&amp;gt;SCGC6 |= SIM_SCGC6_PDB(1);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;SC = PDB_SC_LDMOD(3) | PDB_SC_PRESCALER(0) | PDB_SC_TRGSEL(4) | PDB_SC_MULT(0) | &amp;nbsp;&amp;nbsp;&amp;nbsp;PDB_SC_DMAEN(1) | PDB_SC_CONT(0);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;IDLY = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;SC |=&amp;nbsp; PDB_SC_PDBEN(1) | PDB_SC_LDOK(1);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Lal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 28 Aug 2017 10:10:27 GMT</pubDate>
    <dc:creator>ishwarlal</dc:creator>
    <dc:date>2017-08-28T10:10:27Z</dc:date>
    <item>
      <title>PIT-&gt;PDB-&gt;DMA</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708382#M43452</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are using MK66 with a custom board, AtollicTs no sdk (custom code) .&lt;/P&gt;&lt;P&gt;I am looking for an example to for PDB to trigger DMA transfer. There is a lot of discussion related ADC trigger DMA and PIT trigger DMA and PDB trigger ADC in forum but no post related to PDB trigger DMA.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actually I want to trigger DMA_CH0 &amp;amp; DMA_CH3 with PIT0 the first part is easy PIT0 is internally connected to DMA_CH0 but the second part is tricky, I tried it myself but no success. the first part is working (i-e PIT0 trigger DMA_CH0) but the second part is not working (i-e PIT0-&amp;gt;PDB-&amp;gt;DMA_CH3). My all other PIT channels are already used for other tasks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Dose anyone know have experience with PDB DMA trigger?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Lal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Aug 2017 09:01:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708382#M43452</guid>
      <dc:creator>ishwarlal</dc:creator>
      <dc:date>2017-08-28T09:01:09Z</dc:date>
    </item>
    <item>
      <title>Re: PIT-&gt;PDB-&gt;DMA</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708383#M43453</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Ok I solved the problem it was due to IDLY register, the IDLY is set to 0xFFFF by default and this is to large in my case, I simply set it to 0 and it works.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is the PDB code:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; SIM-&amp;gt;SCGC6 |= SIM_SCGC6_PDB(1);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;SC = PDB_SC_LDMOD(3) | PDB_SC_PRESCALER(0) | PDB_SC_TRGSEL(4) | PDB_SC_MULT(0) | &amp;nbsp;&amp;nbsp;&amp;nbsp;PDB_SC_DMAEN(1) | PDB_SC_CONT(0);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;IDLY = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; PDB0-&amp;gt;SC |=&amp;nbsp; PDB_SC_PDBEN(1) | PDB_SC_LDOK(1);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Lal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Aug 2017 10:10:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708383#M43453</guid>
      <dc:creator>ishwarlal</dc:creator>
      <dc:date>2017-08-28T10:10:27Z</dc:date>
    </item>
    <item>
      <title>Re: PIT-&gt;PDB-&gt;DMA</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708384#M43454</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In case someone also need the DMA code, here it is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;volatile DMA_Type*&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma = DMA0;&lt;BR /&gt;const uint8_t&amp;nbsp; m_Ch = 3;&lt;BR /&gt;uint16_t SrcDataBuff[2];&lt;BR /&gt;uint16_t DestData;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void Init_Dma()&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//Enable clocks&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;CR |= DMA_CR_HOE(1) &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;//DmaHaltOnErr(true)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;| DMA_CR_EDBG(1) &amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;//DmaHaltOnDbg(true)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;| DMA_CR_ERGA(1)&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;//DmaSetGroupAribt(RndRobin)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;| DMA_CR_ERCA(1)&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;//DmaSetChannelAribt(RndRobin)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].ATTR = DMA_ATTR_SSIZE(1) | DMA_ATTR_SMOD(0) | DMA_ATTR_DSIZE(1) | DMA_ATTR_DMOD(0);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//Here put correct source and destination address parameters.&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].SADDR =&amp;nbsp;&amp;nbsp; SrcDataBuff; //Source address&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].SOFF&amp;nbsp; =&amp;nbsp;&amp;nbsp; 2;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; //Source offset&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].SLAST =&amp;nbsp; -4;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp; //Source final address adjustment.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].DADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = &amp;amp;DestData;&amp;nbsp; //destination address&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].DOFF&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].DLAST_SGA = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//number of bytes to transfer per dma request&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].NBYTES_MLNO = 2;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//Dma major iteration count&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].BITER_ELINKYES |= DMA_BITER_ELINKYES_BITER(2); //2 iterations&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;TCD[m_Ch].CITER_ELINKYES = m_pDma-&amp;gt;TCD[m_Ch].BITER_ELINKYES&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//Enable hardware trigger so that PDB can trigger DMA&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;m_pDma-&amp;gt;SERQ = m_Ch;&amp;nbsp;&amp;nbsp; &amp;nbsp;//enable hw triggering.&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;DMAMUX-&amp;gt;CHCFG[m_Ch] = 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;DMAMUX-&amp;gt;CHCFG[m_Ch] = DMAMUX_CHCFG_ENBL(1) | DMAMUX_CHCFG_SOURCE(48); //Select PDB as hw trigger source.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;//at this point you may enable DMA Interrupt.&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Aug 2017 11:41:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/PIT-gt-PDB-gt-DMA/m-p/708384#M43454</guid>
      <dc:creator>ishwarlal</dc:creator>
      <dc:date>2017-08-28T11:41:00Z</dc:date>
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