topic [KEAZN64] Watchdog ISR is not working in Kinetis Microcontrollers

[KEAZN64] Watchdog ISR is not working

mohammedaboelna — Mon, 18 Sep 2017 13:21:51 GMT

I am working on controller KEAZN64 (Cortex M0).

I am trying to implement a staff inside the ISR of the watchdog interrupt before reset.

However, when i write this sample of code;

_INTERRUPT void WDG_IRQHandler (void)
{
PORTA_SET_PIN(_BIT1);
}

and do a breakpoint at line including "PORTA" or wait for PORTA to detect the edge '1'.

Both ways show that ISR is not called after watchdog overflows.

Could someone help me to implement the ISR in a good manner please ?

Re: [KEAZN64] Watchdog ISR is not working

Robin_Shen — Wed, 20 Sep 2017 09:04:22 GMT

Hi Mohammed,

Please download the 'SDK Software Drivers for KEAZ128_KEAZ64 using S32DS' and refer the FRDM_KEA64_WDOG example. You can open this example by using S32DS: S32 Design Studio IDE.

Best Regards,

Robin

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Re: [KEAZN64] Watchdog ISR is not working

mjbcswitzerland — Wed, 20 Sep 2017 10:58:12 GMT

Mohammed

I use this code:

// Watchdog initialisation
UNLOCK_WDOG();
WDOG_CS2 = (WDOG_CS2_CLK_1kHz | WDOG_CS2_FLG);
WDOG_TOVAL = BIG_SHORT_WORD(2000);
WDOG_WIN = 0;
WDOG_CS1 = (WDOG_CS1_INT | WDOG_CS1_EN); // enable watchdog with 2s timeout (no update capability and interrupt 128 bus clocks before the HW reset takes place)

//Enter watchdog handler and enable source in NVIC
fnEnterInterrupt(irq_WDOG_ID, 0, wdog_irq); // test WDOG interrupt (highest priority)

// Watchdog handler
static void wdog_irq(void)
{
WDOG_CS2 |= WDOG_CS2_FLG; // clear interrupt flag
*BOOT_MAIL_BOX = 0x9876; // set a pattern to the boot mailbox to show that the watchdog interrupt took place
}

Note that it is usually not possible to use a debugger to detect the ISR firing since the HW reset takes place unconditionally 128 bus cycles later, which causes the debugger to immediately move to the reset vector instead.

Regards

Mark

http://www.utasker.com/kinetis/FRDM-KEAZ64Q64.html
http://www.utasker.com/kinetis/TRK-KEA64.html