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    <title>topic Re: KL46 SPI0 FIFO in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL46-SPI0-FIFO/m-p/701145#M43121</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Eric,&lt;/P&gt;&lt;P&gt;I am sorry to tell you that the SPI0 of KL46 does not 'include a 4-deep FIFO'.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPI1 includes a 4-deep FIFO.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/13308iEBED29D00DFF50D5/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPI1 includes a 4-deep FIFO.png" alt="SPI1 includes a 4-deep FIFO.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Robin&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 10 Oct 2017 02:17:21 GMT</pubDate>
    <dc:creator>Robin_Shen</dc:creator>
    <dc:date>2017-10-10T02:17:21Z</dc:date>
    <item>
      <title>KL46 SPI0 FIFO</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL46-SPI0-FIFO/m-p/701144#M43120</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I've been working with a FRDM KL46Z and using SPI1 with the FIFO enabled. For my final application I will need to use SPI0 and I thought this would be an easy change with PE in KDS 3.2.0. However, PE does not let me select a HW buffer of 8 (FIFO enabled)&amp;nbsp; for SPI0. It says, "ERROR: The device doesn't support this setting!" I've reviewed the Reference Manual and I have not found anything indicating that this feature is not available for SPI0. Is there something I'm overlooking or is this a bug in PE?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 08 Oct 2017 03:58:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL46-SPI0-FIFO/m-p/701144#M43120</guid>
      <dc:creator>eric_b</dc:creator>
      <dc:date>2017-10-08T03:58:36Z</dc:date>
    </item>
    <item>
      <title>Re: KL46 SPI0 FIFO</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL46-SPI0-FIFO/m-p/701145#M43121</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Eric,&lt;/P&gt;&lt;P&gt;I am sorry to tell you that the SPI0 of KL46 does not 'include a 4-deep FIFO'.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPI1 includes a 4-deep FIFO.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/13308iEBED29D00DFF50D5/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPI1 includes a 4-deep FIFO.png" alt="SPI1 includes a 4-deep FIFO.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Robin&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Oct 2017 02:17:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL46-SPI0-FIFO/m-p/701145#M43121</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2017-10-10T02:17:21Z</dc:date>
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