Kinetis MicrocontrollersのトピックKL82 LPUART0 Baud Half What Expected Based On Theory

KL82 LPUART0 Baud Half What Expected Based On Theory

apikul — Mon, 11 Sep 2017 21:49:31 GMT

Here's my initialization code:

#define _B(x) (1<<x)
void uart_init(){
   SIM_SOPT2 |= (_B(26) ); // Set lpuart clk to SOPT2[PLLFLLSEL]
    SIM_SOPT2 |= (_B(16) | _B(17)); // set PLLFLLSEL to IR48
    SIM_SCGC5 |= _B(20); // turn on gate for lpuart 
    SIM_SCGC5 |= _B(9); // turn on port a
    PORTA_PCR14 = (_B(8) | _B(9) ); // set pin to UART
    PORTA_PCR15 = (_B(8) | _B(9) ); // set pin to UART
 //   LPUART0_BAUD |= _B(17); // more accurate baud
    LPUART0_BAUD &= ~_B(2); // 0 default value there
    LPUART0_BAUD |= 13; // why isn't this 26?
    LPUART0_CTRL |= ( _B(23) | _B(22) | _B(21) ); // turn on interrupts
    LPUART0_FIFO |= (_B(7) | _B(3) | _B(10) | _B(11) ); // turn on the fifo and throw a read interupt if idle for 4    characters
    LPUART0_WATER |= (5<<16) | 2; // buffers are eight bytes, do everything in chunks of five (notify RX if < 5    //in buffer, send 5 if > 2 in buffer)
    LPUART0_CTRL |= ( _B(19) | _B(18) ); // up and away!
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

My issue is with line 11. I'm expecting by the equation to write 26 there.

Clock / ((OSR+1) * SBR )

48Mhz / (( 15 +1) * 26 )

I figured the 48Mhz was getting halved somewhere but all the divider ratios are left @ default etc. Not quite sure what to make it. It works @ `SBR = 13` well <1% of 115200 but it's bothering me™

Re: KL82 LPUART0 Baud Half What Expected Based On Theory

mjbcswitzerland — Tue, 12 Sep 2017 10:43:42 GMT

Hi Andrew

Check whether the IRC48 is being halved in SIM_CLKDIV3.

These are the LPUART0 register values when LPUART0 is operating at 115200 Baud from the 48MHz IRC.

#md 40054000 l 8
Memory Display
0x40054000 0f00001a 00100000 00ac0000 00001000 ................
0x40054010 00000000 00000000 00410022 00000100 .........A."....

which look to be what you are also setting.

You can load the binary at http://www.utasker.com/kinetis/FRDM-KL82Z.html to a FRDM-KL82Z board to communicate at 115200 Baud on LPUART0 (OpenSDA VCOM) and either compare its peripheral setups with yours in a debugger or use its memory display menu to browse register setups to find the difference and cause of your issue.

Eg. Here is how I check the LPUART0 registers:

Serial number: 00
Software version V1.4.012
Device identification: KINETIS

     Main menu                              <---- hit enter key to get menu
===================
1              Configure LAN interface
2              Configure serial interface
3              Go to I/O menu
4              Go to administration menu
5              Go to overview/statistics menu
6              Go to USB menu
7              Go to I2C menu
8              Go to utFAT disk interface
9              FTP/TELNET client commands
a              CAN commands
help           Display menu specific help
quit           Leave command mode
3                                         <--- user 3 and enter to move to the I/O menu

Input/Output menu
===================
up             go to main menu
md             Memory Display [address] [<l>|<w>|<b>] [num]
mm             Memory Modify [address] [<l>|<w>|<b>] [val]
mf             Memory Fill [address] [<l>|<w>|<b>] [val] [num]
sd             Storage Display {as md}
sm             Storage Modify {as mm}
sf             Storage Fill {as mf}
se             Storage Erase [address] [len-hex]
lp_cnt         Read LPTMR CNT
save           Save port setting as default
help           Display menu specific help
quit           Leave command mode

#md 40054000 l 8      <- display 8 long words from address 0x40054000 (address of LPUART0 register block)
Memory Display
0x40054000     0f00001a 00100000 00ac0000 00001000 ................
0x40054010     00000000 00000000 00410022 00000100 .........A."....

Regards

Mark

Re: KL82 LPUART0 Baud Half What Expected Based On Theory

jingpan — Wed, 13 Sep 2017 03:16:51 GMT

Hi Andrew,

Please check SIM_CLKDIV3 to see if it divids IRC48M clock.

Regards

Jing