topic Re: KE18 auto trim frequency in Kinetis Microcontrollers

KE18 auto trim frequency

davidsherman — Fri, 08 Sep 2017 15:30:15 GMT

The KE18F512 manual mentions trimming the FIRC clock, and shows registers for enabling the auto trim from an external clock. It shows the divider settings as well, but the one thing it doesn't mention is what the reference frequency is supposed to be. What is the reference frequency?

Re: KE18 auto trim frequency

Robin_Shen — Thu, 14 Sep 2017 02:24:01 GMT

Hi David,

Sorry for the late reply!

System OSC can be configured as clock source to tune the Fast IRC.

And you can find the frequency in 'Table 44. External Oscillator frequency specifications (OSC)' of KE1xFP100M168SF0.

Best Regards,

Robin

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Re: KE18 auto trim frequency

davidsherman — Thu, 14 Sep 2017 12:29:23 GMT

Unfortunately, that didn't answer my question at all. I've already seen exactly what you've posted, there is no mention of the reference frequency the auto tune needs. It talks about the divider "divide the system OSC down for Fast IRC trimming", but what frequency do you divide it down to? The frequency ranges you mention only show the ranges the oscillator is capable of working, not what the reference frequency for fast IRC trimming is.

Re: KE18 auto trim frequency

davidsherman — Wed, 20 Sep 2017 12:17:45 GMT

Still looking for an answer on this, the reference manual is lacking some information, like what frequency the auto tune expects to use the auto tune feature. Can this feature be used?

Re: KE18 auto trim frequency

Robin_Shen — Wed, 20 Sep 2017 22:13:35 GMT

Hi David,

Sorry for the inconvenience.

I have asked the Kinetis AE team for help on this case. And I will inform you as soon as I get any feedback.

Best Regards,

Robin

Re: KE18 auto trim frequency

davidsherman — Thu, 21 Sep 2017 12:10:37 GMT

Thank you for looking into this, I appreciate it.

Re: KE18 auto trim frequency

Robin_Shen — Thu, 28 Sep 2017 06:06:47 GMT

The Fast IRC Trim Predivide[TRIMDIV] is intended for the SOSC and the expectation is to set the div ratio to give you a 31250Hz divided clock, so it configure the SCG_FIRCTCFG[TRIMDIV] according the external OSC frequency.

Best Regards,

Robin