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    <title>Kinetis MicrocontrollersのトピックRe: K26 multi channel DMA issue</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697311#M42865</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jing&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried catching writes to the register, but so far i have not been able to do that..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As decribed, the issue occurs only when SAI DMA is running in i circular mode in parrallel with the SPI DMA transations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The TCD's are able to clear the ERQ via the TCDn_CSR reg but this should be related to the specific channel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br Anders&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Oct 2017 08:46:54 GMT</pubDate>
    <dc:creator>aescov</dc:creator>
    <dc:date>2017-10-12T08:46:54Z</dc:date>
    <item>
      <title>K26 multi channel DMA issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697309#M42863</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a setup using using 4 DMA channel for SAI RX/TX and SPI RX/TX.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SAI DMA is running in circular mode ( 10 chained tcd's) , and the for SPI DMA is handling data transaction of fixed specified length, writing data to external memory. (Single tcd)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Both DMA setups run perfectly if the running alone. And when operating in a synchronous setup where data received from SAI is written to SPI immediately after SAI DMA has finished a tcd, the system seems to operate fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But when SPI transaction are started asynchronous to the SAI part, i see that the ERQ bit of the channel handling SPI TX often gets cleared and the SPI DMA stalls.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried using different DMA channel, but so far it is always the ERQ bit of the SPI TX channel that gets cleared.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When the DMA stalls i can break my system and set the relevant bit in the ERQ register and the system is able to continue operation for a short time before failing again. I see no errors reported in the DMA status registers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have set breakpoint in all parts of the code accessing the ERQ bits ( ERG/SERQ/CERG registers), but none of these are triggered when failing..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any suggestions will be appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/Anders&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Oct 2017 07:44:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697309#M42863</guid>
      <dc:creator>aescov</dc:creator>
      <dc:date>2017-10-03T07:44:15Z</dc:date>
    </item>
    <item>
      <title>Re: K26 multi channel DMA issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697310#M42864</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Anders,&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;As I know, ERQ bits will not change automaticlly, it must be changed by software or reset. If you can't find how this bit get changed, maybe you can trace it.&amp;nbsp; For example, KEIL can set data access breakpoint. If you still can't solve the problem, would you mind to show me the corresponding code so that I can take a look?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Jing&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Oct 2017 06:10:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697310#M42864</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2017-10-11T06:10:34Z</dc:date>
    </item>
    <item>
      <title>Re: K26 multi channel DMA issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697311#M42865</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jing&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have tried catching writes to the register, but so far i have not been able to do that..&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As decribed, the issue occurs only when SAI DMA is running in i circular mode in parrallel with the SPI DMA transations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The TCD's are able to clear the ERQ via the TCDn_CSR reg but this should be related to the specific channel.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br Anders&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Oct 2017 08:46:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K26-multi-channel-DMA-issue/m-p/697311#M42865</guid>
      <dc:creator>aescov</dc:creator>
      <dc:date>2017-10-12T08:46:54Z</dc:date>
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