<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: RPMSG / AMP between CPU and MCU in separate chips in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674137#M41429</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From the technical perspective, the RPMSG/AMP is really designed for asymmetric multiprocessor systems, the most common way for different cores to cooperate to use a shared memory-based communication.&amp;nbsp; Here the cores means "dual core" not "two cores". So what you mentioned the two seperated two chips, I do not think that the PRMSG applied.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 15 May 2017 05:28:23 GMT</pubDate>
    <dc:creator>fangli</dc:creator>
    <dc:date>2017-05-15T05:28:23Z</dc:date>
    <item>
      <title>RPMSG / AMP between CPU and MCU in separate chips</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674135#M41427</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm reading about RPMSG and openAMP:&amp;nbsp;&lt;BR /&gt;&lt;A class="link-titled" href="https://nxpmicro.github.io/rpmsg-lite/" title="https://nxpmicro.github.io/rpmsg-lite/"&gt;RPMsg-Lite User's Guide: RPMsg Component&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/NXPmicro/rpmsg-lite" title="https://github.com/NXPmicro/rpmsg-lite"&gt;GitHub - NXPmicro/rpmsg-lite: RPMsg implementation for small MCUs&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://github.com/OpenAMP/open-amp/blob/master/docs/openamp_ref.pdf" title="https://github.com/OpenAMP/open-amp/blob/master/docs/openamp_ref.pdf"&gt;open-amp/openamp_ref.pdf at master · OpenAMP/open-amp · GitHub&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It seems that RPMSG is principally use when two CPU or when a CPU/MCU are inside the same silicon chip.&lt;BR /&gt;(ex: i.mx6 SoloX or i.mx7 or vybrid)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, I would like to know if :&lt;BR /&gt;Is it&amp;nbsp;possible to&amp;nbsp;use RPMSG between an (external) Kinetis MCU and a (external) Single core i.mx6 ?&lt;BR /&gt;&lt;SPAN&gt;(or)&lt;BR /&gt;Is it&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;possible to&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;use RPMSG between two external Kinetis MCU ?&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;In short, does RPMSG / OpenAMP applies only to single silicon chip with multiple cores or can I use it between two separate chips ? &amp;nbsp;What would be the best interface between these chips ? (UART or SPI ?)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;ssinfod&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 May 2017 20:52:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674135#M41427</guid>
      <dc:creator>ssinfod</dc:creator>
      <dc:date>2017-05-09T20:52:07Z</dc:date>
    </item>
    <item>
      <title>Re: RPMSG / AMP between CPU and MCU in separate chips</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674136#M41428</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi RPMSG lite is using shared memory (i am not sure but shared memory is the main request). Here is RPMSG example on iMX and Lpc board :&amp;nbsp;&lt;A class="link-titled" href="https://github.com/EmbeddedRPC/erpc-imx-demos" title="https://github.com/EmbeddedRPC/erpc-imx-demos"&gt;GitHub - EmbeddedRPC/erpc-imx-demos: eRPC demos for i.MX devices&lt;/A&gt;.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 May 2017 20:33:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674136#M41428</guid>
      <dc:creator>dusancervenka-b</dc:creator>
      <dc:date>2017-05-11T20:33:23Z</dc:date>
    </item>
    <item>
      <title>Re: RPMSG / AMP between CPU and MCU in separate chips</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674137#M41429</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From the technical perspective, the RPMSG/AMP is really designed for asymmetric multiprocessor systems, the most common way for different cores to cooperate to use a shared memory-based communication.&amp;nbsp; Here the cores means "dual core" not "two cores". So what you mentioned the two seperated two chips, I do not think that the PRMSG applied.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 15 May 2017 05:28:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/RPMSG-AMP-between-CPU-and-MCU-in-separate-chips/m-p/674137#M41429</guid>
      <dc:creator>fangli</dc:creator>
      <dc:date>2017-05-15T05:28:23Z</dc:date>
    </item>
  </channel>
</rss>

