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    <title>topic K20 with external SRAM in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222887#M4124</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am designing a new device, and plan to use the MK20DX64VLH7 Kinetis MUC. This system need 256kB external SRAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have read the thread &lt;A href="https://community.nxp.com/thread/102682"&gt;K20 external memory interface description wanted.&lt;/A&gt; But still not absolute sure. From the datasheet of the MK20DX64VLH7, there are FB_AD[17:0], FB_RW, FB_ALE/CS1/TS, FB_CS0#. &lt;/P&gt;&lt;P&gt;The SRAM Chip have A[17:0], D[15:0], WE#, OE#, CS1# and CS2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can i use that SRAM in multiplexed mode, by&lt;/P&gt;&lt;P&gt;latching the FB_AD[17:0] to SRAM_A[17:0], &lt;/P&gt;&lt;P&gt;FB_AD[15:0] to SRAM_D[15:0], &lt;/P&gt;&lt;P&gt;FB_RW to SRAM_WE#, &lt;/P&gt;&lt;P&gt;FB_ALE to the latched_FB_AD[17:0]&lt;/P&gt;&lt;P&gt;FB_CS0 to SRAM_CS0#?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Or do i any more glue logic? In the link above, the FB_AD[31:16] are used for data bus, but those pins are not available on the 64pin MK20DX64VLH7.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For this K20 device, the Fsys frequency is 36MHz. What could i expect as burst read/write rate? Considered the SRAM fast enough, are additional wait states required?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help or shared experiences with a multiplexed SRAM on the Kinetis would be helpful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MS&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 13 Mar 2013 13:15:50 GMT</pubDate>
    <dc:creator>michaelschmid</dc:creator>
    <dc:date>2013-03-13T13:15:50Z</dc:date>
    <item>
      <title>K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222887#M4124</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am designing a new device, and plan to use the MK20DX64VLH7 Kinetis MUC. This system need 256kB external SRAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have read the thread &lt;A href="https://community.nxp.com/thread/102682"&gt;K20 external memory interface description wanted.&lt;/A&gt; But still not absolute sure. From the datasheet of the MK20DX64VLH7, there are FB_AD[17:0], FB_RW, FB_ALE/CS1/TS, FB_CS0#. &lt;/P&gt;&lt;P&gt;The SRAM Chip have A[17:0], D[15:0], WE#, OE#, CS1# and CS2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can i use that SRAM in multiplexed mode, by&lt;/P&gt;&lt;P&gt;latching the FB_AD[17:0] to SRAM_A[17:0], &lt;/P&gt;&lt;P&gt;FB_AD[15:0] to SRAM_D[15:0], &lt;/P&gt;&lt;P&gt;FB_RW to SRAM_WE#, &lt;/P&gt;&lt;P&gt;FB_ALE to the latched_FB_AD[17:0]&lt;/P&gt;&lt;P&gt;FB_CS0 to SRAM_CS0#?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Or do i any more glue logic? In the link above, the FB_AD[31:16] are used for data bus, but those pins are not available on the 64pin MK20DX64VLH7.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For this K20 device, the Fsys frequency is 36MHz. What could i expect as burst read/write rate? Considered the SRAM fast enough, are additional wait states required?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help or shared experiences with a multiplexed SRAM on the Kinetis would be helpful.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;MS&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Mar 2013 13:15:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222887#M4124</guid>
      <dc:creator>michaelschmid</dc:creator>
      <dc:date>2013-03-13T13:15:50Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222888#M4125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;According to K20 product brief (page 25):&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.freescale.com/files/32bit/doc/prod_brief/K20PB.pdf" title="http://www.freescale.com/files/32bit/doc/prod_brief/K20PB.pdf"&gt;http://www.freescale.com/files/32bit/doc/prod_brief/K20PB.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="FlexBus K20.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119165i20BC5B2D6245CA54/image-size/large?v=v2&amp;amp;px=999" role="button" title="FlexBus K20.png" alt="FlexBus K20.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can refer to AN4393 "Using FlexBus Interface for Kinetis Microcontrollers" Applicaction Note&lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf" title="http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf"&gt;http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf &lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It looks that latching in multiplexed mode as you wrote can work.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Mar 2013 17:53:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222888#M4125</guid>
      <dc:creator>adriansc</dc:creator>
      <dc:date>2013-03-13T17:53:56Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222889#M4126</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Michael, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;how is it going? Was it helpful? &lt;/P&gt;&lt;P&gt;We'd like to know! :smileywink:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Mar 2013 20:17:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222889#M4126</guid>
      <dc:creator>Monica</dc:creator>
      <dc:date>2013-03-19T20:17:11Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222890#M4127</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Monica,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks. First of all, i was impressed about the fast answer. And happy, that the answer was positive for my problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actually, I have not implemented the details, so i dont know if the resulting hardware will work as expected. But i am positive for that. &lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;best regards,&lt;/P&gt;&lt;P&gt;MS&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Mar 2013 09:05:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222890#M4127</guid>
      <dc:creator>michaelschmid</dc:creator>
      <dc:date>2013-03-20T09:05:35Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222891#M4128</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Excellent Michael, we'll be around! :smileywink:&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Mar 2013 19:40:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222891#M4128</guid>
      <dc:creator>Monica</dc:creator>
      <dc:date>2013-03-20T19:40:20Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222892#M4129</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I am wondering the same thing.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The application note surely helps but does not show explicitly how to connect a 16bit(data bus) SRAM. I would REALLY appreciate to know exactly how to connect SRAM for maximum performance, preferably with a specific suggested SRAM device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a ton!!&lt;/P&gt;&lt;P&gt;//bjoern&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Nov 2013 18:08:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222892#M4129</guid>
      <dc:creator>bjoernjohanness</dc:creator>
      <dc:date>2013-11-07T18:08:53Z</dc:date>
    </item>
    <item>
      <title>Re: K20 with external SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222893#M4130</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Bjoern,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would recommend you submit a &lt;A href="https://www.freescale.com/webapp/servicerequest.create_SR.framework"&gt;Service Request&lt;/A&gt; :smileyhappy: &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best,&lt;/P&gt;&lt;P&gt;Monica&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Nov 2013 22:04:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K20-with-external-SRAM/m-p/222893#M4130</guid>
      <dc:creator>Monica</dc:creator>
      <dc:date>2013-11-07T22:04:42Z</dc:date>
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