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    <title>Kinetis MicrocontrollersのトピックRe: Interfacing 2 16-bit SDRAM modules with K65 to form 32-bit port</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-2-16-bit-SDRAM-modules-with-K65-to-form-32-bit-port/m-p/664043#M40813</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I see your issue that the two 2M x16 x4 SDRAM with 9 bits conlumn address needs row address from A0 to A13, but the Table 35-12 only have A0~A12 address, one extra address line A13 is required.&lt;/P&gt;&lt;P&gt;Pls refer to the following note that "The maximum SDRAM address size is 128 Mbits." in RM of K65, the SDRAM maximum size the K65 supports&amp;nbsp; is 128M bits, but your SDRAM size is 2M*32*4=256M bits, so if you use two SDRAM chip, you can only use only half of them. so I suggest you use only one.&lt;/P&gt;&lt;P&gt;Hope it can help you&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;XiangJun Rong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/14008iA47B2956326FEAD5/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 08 Feb 2017 09:50:41 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2017-02-08T09:50:41Z</dc:date>
    <item>
      <title>Interfacing 2 16-bit SDRAM modules with K65 to form 32-bit port</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-2-16-bit-SDRAM-modules-with-K65-to-form-32-bit-port/m-p/664042#M40812</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to interface two 16-bit wide SDRAM modules with a K65 to form a 32-bit port. &amp;nbsp;I want to use two 2M x16 x4 modules. &amp;nbsp;I have read through the reference manual and it seems that Table 35-12 meets my criteria (9-column address lines). &amp;nbsp;However, there are not enough address lines to connect the bank address lines BA0 and BA1. &amp;nbsp;I don't understand why certain address lines are not used when working with a 32-bit port compared to a 16-bit port. &amp;nbsp;Can you please help me with the correct hardware connections for a pair of&amp;nbsp;2M x16 x4 bank SDRAM modules?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Feb 2017 00:20:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-2-16-bit-SDRAM-modules-with-K65-to-form-32-bit-port/m-p/664042#M40812</guid>
      <dc:creator>dclen</dc:creator>
      <dc:date>2017-02-03T00:20:39Z</dc:date>
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    <item>
      <title>Re: Interfacing 2 16-bit SDRAM modules with K65 to form 32-bit port</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-2-16-bit-SDRAM-modules-with-K65-to-form-32-bit-port/m-p/664043#M40813</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I see your issue that the two 2M x16 x4 SDRAM with 9 bits conlumn address needs row address from A0 to A13, but the Table 35-12 only have A0~A12 address, one extra address line A13 is required.&lt;/P&gt;&lt;P&gt;Pls refer to the following note that "The maximum SDRAM address size is 128 Mbits." in RM of K65, the SDRAM maximum size the K65 supports&amp;nbsp; is 128M bits, but your SDRAM size is 2M*32*4=256M bits, so if you use two SDRAM chip, you can only use only half of them. so I suggest you use only one.&lt;/P&gt;&lt;P&gt;Hope it can help you&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;XiangJun Rong&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/14008iA47B2956326FEAD5/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 08 Feb 2017 09:50:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-2-16-bit-SDRAM-modules-with-K65-to-form-32-bit-port/m-p/664043#M40813</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2017-02-08T09:50:41Z</dc:date>
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