<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: flexbus for sram and 16bit 8080 lcd in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/flexbus-for-sram-and-16bit-8080-lcd/m-p/657721#M40298</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;I have checked the part of schematics, I think the SRAM circuit is okay. But for the LCD part, I do not know why you do not use the FB_OE and FB_R/W signals to access the LCD the same as the interface of SRAM?&lt;/P&gt;&lt;P&gt;For LCD interface, it seems that this is a FIFO model, it only need OE, CS, WE and data bus, there is not address signals, right? if it is the case, i think your schematics is okay, otherwise, latch is required to latch the low address.&lt;/P&gt;&lt;P&gt;Hope it can help you.&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Sep 2016 04:08:10 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2016-09-29T04:08:10Z</dc:date>
    <item>
      <title>flexbus for sram and 16bit 8080 lcd</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/flexbus-for-sram-and-16bit-8080-lcd/m-p/657720#M40297</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone :&lt;/P&gt;&lt;P&gt;I'm using a k22fn1m0vll12 for a hmi porject, and want use the flexbus connect a 8bit&amp;nbsp;&lt;A href="https://community.nxp.com/t5/tag/sram/tg-p"&gt;#sram&lt;/A&gt; for framebuffer and 16bit 8080bus lcd,&lt;/P&gt;&lt;P&gt;is there&amp;nbsp;any problem in hardware connection ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="MEMANDLCD.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/1083i76BADDC0B50AFFED/image-size/large?v=v2&amp;amp;px=999" role="button" title="MEMANDLCD.JPG" alt="MEMANDLCD.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 28 Sep 2016 05:57:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/flexbus-for-sram-and-16bit-8080-lcd/m-p/657720#M40297</guid>
      <dc:creator>rqbh</dc:creator>
      <dc:date>2016-09-28T05:57:45Z</dc:date>
    </item>
    <item>
      <title>Re: flexbus for sram and 16bit 8080 lcd</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/flexbus-for-sram-and-16bit-8080-lcd/m-p/657721#M40298</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;I have checked the part of schematics, I think the SRAM circuit is okay. But for the LCD part, I do not know why you do not use the FB_OE and FB_R/W signals to access the LCD the same as the interface of SRAM?&lt;/P&gt;&lt;P&gt;For LCD interface, it seems that this is a FIFO model, it only need OE, CS, WE and data bus, there is not address signals, right? if it is the case, i think your schematics is okay, otherwise, latch is required to latch the low address.&lt;/P&gt;&lt;P&gt;Hope it can help you.&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Sep 2016 04:08:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/flexbus-for-sram-and-16bit-8080-lcd/m-p/657721#M40298</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2016-09-29T04:08:10Z</dc:date>
    </item>
  </channel>
</rss>

