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    <title>topic Hard Fault trying to access LPUART0-&amp;gt;STAT in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656510#M40133</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I recently broke the serial I/O routines&amp;nbsp;in my KL27Z :smileysilly:: I'm now getting hard faults when I first try to access the LPUART0-&amp;gt;STAT register in the LPUART_GetStatusFlags(base) method, specifically:&lt;/P&gt;&lt;PRE&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;PRE&gt;temp = base-&amp;gt;STAT;&lt;/PRE&gt;&lt;/BLOCKQUOTE&gt;&lt;/PRE&gt;&lt;P&gt;... where base = LPUART0 =&amp;nbsp;0x40054000. &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any hints on what I might have failed to initialize?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Prior to calling LPUART_GetStatusFlags(base), I've done the following:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;PRE&gt;&lt;PRE&gt;&amp;nbsp; // from BOARD_InitPins()
&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;CLOCK_EnableClock(&lt;SPAN class=""&gt;kCLOCK_PortA&lt;/SPAN&gt;); &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN class=""&gt;/* Port A Clock Gate Control: Clock enabled */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;PORT_SetPinMux(PORTA, PIN1_IDX, &lt;/SPAN&gt;&lt;SPAN class=""&gt;kPORT_MuxAlt2&lt;/SPAN&gt;&lt;SPAN class=""&gt;);&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;/* PORTA1 (pin 23) is configured as LPUART0_RX */&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;PORT_SetPinMux(PORTA, PIN2_IDX, &lt;/SPAN&gt;&lt;SPAN class=""&gt;kPORT_MuxAlt2&lt;/SPAN&gt;&lt;SPAN class=""&gt;);&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;/* PORTA2 (pin 24) is configured as LPUART0_TX */&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;SIM-&amp;gt;&lt;SPAN class=""&gt;SOPT5&lt;/SPAN&gt; = ((SIM-&amp;gt;&lt;SPAN class=""&gt;SOPT5&lt;/SPAN&gt; &amp;amp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) &lt;SPAN class=""&gt;/* Mask bits to zero which are setting */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;| SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) &lt;SPAN class=""&gt;/* LPUART0 Transmit Data Source Select: LPUART0_TX pin */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;| SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX) &lt;SPAN class=""&gt;/* LPUART0 Receive Data Source Select: LPUART_RX pin */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;);&lt;/P&gt;
&amp;nbsp; // Serial initialization
&lt;P class=""&gt;&amp;nbsp; CLOCK_SetLpuart0Clock(0x03);&amp;nbsp; // MCGIRCLK (correct?)&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; lpuart_config_t&lt;SPAN class=""&gt; config;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; LPUART_GetDefaultConfig(&amp;amp;config);
&amp;nbsp; config.baudRate_Bps = baud_rate;
&amp;nbsp; config.enableTx = true;
&amp;nbsp; config.enableRx = true;&lt;/P&gt;&amp;nbsp; LPUART_Init(LPUART0, &amp;amp;config, CLOCK_GetFreq(&lt;SPAN style="background-color: #f6f6f6;"&gt;kCLOCK_McgInternalRefClk&lt;/SPAN&gt;));

&amp;nbsp; // ### It gets a hard fault inside the call to LPUART_GetStatusFlags ###
&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN class=""&gt;while&lt;/SPAN&gt; (!(&lt;SPAN class=""&gt;kLPUART_TxDataRegEmptyFlag&lt;/SPAN&gt; &amp;amp; LPUART_GetStatusFlags(LPUART0))) {&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;// busy wait for previous &lt;SPAN class=""&gt;tx&lt;/SPAN&gt; data...&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;}&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; // ... doesn't get here...&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;LPUART_WriteByte(&lt;SPAN style="background-color: #f6f6f6;"&gt;LPUART0&lt;/SPAN&gt;, ch);&lt;/P&gt;&lt;/PRE&gt;&lt;/PRE&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 02 May 2017 21:26:22 GMT</pubDate>
    <dc:creator>robertpoor</dc:creator>
    <dc:date>2017-05-02T21:26:22Z</dc:date>
    <item>
      <title>Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656510#M40133</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I recently broke the serial I/O routines&amp;nbsp;in my KL27Z :smileysilly:: I'm now getting hard faults when I first try to access the LPUART0-&amp;gt;STAT register in the LPUART_GetStatusFlags(base) method, specifically:&lt;/P&gt;&lt;PRE&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;PRE&gt;temp = base-&amp;gt;STAT;&lt;/PRE&gt;&lt;/BLOCKQUOTE&gt;&lt;/PRE&gt;&lt;P&gt;... where base = LPUART0 =&amp;nbsp;0x40054000. &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any hints on what I might have failed to initialize?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Prior to calling LPUART_GetStatusFlags(base), I've done the following:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;PRE&gt;&lt;PRE&gt;&amp;nbsp; // from BOARD_InitPins()
&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;CLOCK_EnableClock(&lt;SPAN class=""&gt;kCLOCK_PortA&lt;/SPAN&gt;); &lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;SPAN class=""&gt;/* Port A Clock Gate Control: Clock enabled */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;PORT_SetPinMux(PORTA, PIN1_IDX, &lt;/SPAN&gt;&lt;SPAN class=""&gt;kPORT_MuxAlt2&lt;/SPAN&gt;&lt;SPAN class=""&gt;);&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;/* PORTA1 (pin 23) is configured as LPUART0_RX */&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;PORT_SetPinMux(PORTA, PIN2_IDX, &lt;/SPAN&gt;&lt;SPAN class=""&gt;kPORT_MuxAlt2&lt;/SPAN&gt;&lt;SPAN class=""&gt;);&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;/* PORTA2 (pin 24) is configured as LPUART0_TX */&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;SIM-&amp;gt;&lt;SPAN class=""&gt;SOPT5&lt;/SPAN&gt; = ((SIM-&amp;gt;&lt;SPAN class=""&gt;SOPT5&lt;/SPAN&gt; &amp;amp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;(~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) &lt;SPAN class=""&gt;/* Mask bits to zero which are setting */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;| SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) &lt;SPAN class=""&gt;/* LPUART0 Transmit Data Source Select: LPUART0_TX pin */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;| SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX) &lt;SPAN class=""&gt;/* LPUART0 Receive Data Source Select: LPUART_RX pin */&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;);&lt;/P&gt;
&amp;nbsp; // Serial initialization
&lt;P class=""&gt;&amp;nbsp; CLOCK_SetLpuart0Clock(0x03);&amp;nbsp; // MCGIRCLK (correct?)&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; lpuart_config_t&lt;SPAN class=""&gt; config;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; LPUART_GetDefaultConfig(&amp;amp;config);
&amp;nbsp; config.baudRate_Bps = baud_rate;
&amp;nbsp; config.enableTx = true;
&amp;nbsp; config.enableRx = true;&lt;/P&gt;&amp;nbsp; LPUART_Init(LPUART0, &amp;amp;config, CLOCK_GetFreq(&lt;SPAN style="background-color: #f6f6f6;"&gt;kCLOCK_McgInternalRefClk&lt;/SPAN&gt;));

&amp;nbsp; // ### It gets a hard fault inside the call to LPUART_GetStatusFlags ###
&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN class=""&gt;while&lt;/SPAN&gt; (!(&lt;SPAN class=""&gt;kLPUART_TxDataRegEmptyFlag&lt;/SPAN&gt; &amp;amp; LPUART_GetStatusFlags(LPUART0))) {&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &amp;nbsp; &lt;/SPAN&gt;&lt;/SPAN&gt;// busy wait for previous &lt;SPAN class=""&gt;tx&lt;/SPAN&gt; data...&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;}&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp; // ... doesn't get here...&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;/SPAN&gt;LPUART_WriteByte(&lt;SPAN style="background-color: #f6f6f6;"&gt;LPUART0&lt;/SPAN&gt;, ch);&lt;/P&gt;&lt;/PRE&gt;&lt;/PRE&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 May 2017 21:26:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656510#M40133</guid>
      <dc:creator>robertpoor</dc:creator>
      <dc:date>2017-05-02T21:26:22Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656511#M40134</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Check that the LPUART is enabled/clocked in SIM_SCGC5 before accessing any of its registers.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;#define SIM_SCGC5_LPUART0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00100000&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 00:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656511#M40134</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2017-05-03T00:48:57Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656512#M40135</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Mark: That's a good start -- thanks! &amp;nbsp;I'm looking over the LPUART interrupt example:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&amp;lt;sdk&amp;gt;/boards/frdmkl27z/driver_examples/lpuart/interrupt/&lt;/BLOCKQUOTE&gt;&lt;P&gt;... and trying to figure out where SIM_SCGC5 is getting set there. &amp;nbsp;What's the name of the method there that's setting&amp;nbsp;SIM_SCGC5? &amp;nbsp;Thanks in advance (in the meantime I'll keep digging...).&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 01:23:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656512#M40135</guid>
      <dc:creator>robertpoor</dc:creator>
      <dc:date>2017-05-03T01:23:06Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656513#M40136</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Robert&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I don't know what method is used in the example.&lt;BR /&gt;I use (in the uTasker project)&lt;BR /&gt;&lt;STRONG&gt;POWER_UP(5, SIM_SCGC5_LPUART0);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // power up LPUART 0&lt;/STRONG&gt;&lt;BR /&gt;which equates to&lt;BR /&gt;&lt;STRONG&gt;SIM_SCGC5 |= SIM_SCGC5_LPUART0;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;and ultimately to&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;*(volatile unsigned long*)(0x40048038) |= 0x00100000;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 01:37:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656513#M40136</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2017-05-03T01:37:39Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656514#M40137</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Fair enough - thanks. &amp;nbsp;I believe part of my problem is that I'm running in VLPR mode (rather than RUN mode) and I need to adjust clock sources accordingly. &amp;nbsp;I'll keep digging.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 01:41:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656514#M40137</guid>
      <dc:creator>robertpoor</dc:creator>
      <dc:date>2017-05-03T01:41:03Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656515#M40138</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Solved my problem. &amp;nbsp;It was in the call to&amp;nbsp;CLOCK_GetFreq(...) -- I was passing&amp;nbsp;kCLOCK_McgIrc48MClk (despite what I showed in my code above) rather than&amp;nbsp;kCLOCK_McgInternalRefClk for VLPR mode and&amp;nbsp;kCLOCK_McgPeriphClk for RUN mode.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 08:01:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656515#M40138</guid>
      <dc:creator>robertpoor</dc:creator>
      <dc:date>2017-05-03T08:01:11Z</dc:date>
    </item>
    <item>
      <title>Re: Hard Fault trying to access LPUART0-&gt;STAT</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656516#M40139</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Robert,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The KSDK software is using below function to enable the LPUART0 module clock at SIM_SCGC5 register:&lt;/P&gt;&lt;P&gt;/*!&lt;BR /&gt;&amp;nbsp;* @brief Enable the clock for specific IP.&lt;BR /&gt;&amp;nbsp;*&lt;BR /&gt;&amp;nbsp;* @param name&amp;nbsp; Which clock to enable, see \ref clock_ip_name_t.&lt;BR /&gt;&amp;nbsp;*/&lt;BR /&gt;static inline void CLOCK_EnableClock(clock_ip_name_t name)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t regAddr = SIM_BASE + CLK_GATE_ABSTRACT_REG_OFFSET((uint32_t)name);&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; (*(volatile uint32_t *)regAddr) |= (1U &amp;lt;&amp;lt; CLK_GATE_ABSTRACT_BITS_SHIFT((uint32_t)name));&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please add below code to your application before any LPUART0 register access:&lt;/P&gt;&lt;P&gt;CLOCK_EnableClock(kCLOCK_Lpuart0);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 03 May 2017 08:14:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Hard-Fault-trying-to-access-LPUART0-gt-STAT/m-p/656516#M40139</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2017-05-03T08:14:33Z</dc:date>
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