<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic K22F FlexBus SRAM in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22F-FlexBus-SRAM/m-p/654678#M39949</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This is my configuration of FlexBUS for IS61LV256AL&amp;nbsp;SRAM (&lt;A href="http://www.mouser.com/ds/2/198/61LV256AL-258426.pdf"&gt;http://www.mouser.com/ds/2/198/61LV256AL-258426.pdf&lt;/A&gt;) and MK22FN512VLL12&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; FB-&amp;gt;CS[0].CSCR&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSCR_PS(1)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 8-bit port7&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSCR_ASET(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_RDAH(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_WRAH(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSCR_AA_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; // auto-acknowledge&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_WS(0x0)&amp;nbsp;&amp;nbsp; // 2 wait states&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_BSTR_MASK&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_BSTW_MASK&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; FB-&amp;gt;CS[0].CSMR = FB_CSMR_BAM(0x7)&amp;nbsp; //Set base address mask for 512K address space&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSMR_V_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; //Enable cs valid signal&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;With this code, read of 8-bit wide data takes 5 FlexBus cycles. However, reference manual (&lt;A href="http://www.nxp.com/assets/documents/data/en/reference-manuals/K22P121M120SF7RM.pdf"&gt;http://www.nxp.com/assets/documents/data/en/reference-manuals/K22P121M120SF7RM.pdf&lt;/A&gt; , page 711) states that it should take only 4 FlexBus cycles.&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;Is it possible to improve performance of FlexBus read&amp;nbsp;in my case?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 20 Feb 2017 20:17:37 GMT</pubDate>
    <dc:creator>martindusek</dc:creator>
    <dc:date>2017-02-20T20:17:37Z</dc:date>
    <item>
      <title>K22F FlexBus SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22F-FlexBus-SRAM/m-p/654678#M39949</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This is my configuration of FlexBUS for IS61LV256AL&amp;nbsp;SRAM (&lt;A href="http://www.mouser.com/ds/2/198/61LV256AL-258426.pdf"&gt;http://www.mouser.com/ds/2/198/61LV256AL-258426.pdf&lt;/A&gt;) and MK22FN512VLL12&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; FB-&amp;gt;CS[0].CSCR&amp;nbsp; =&amp;nbsp;&amp;nbsp; FB_CSCR_PS(1)&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 8-bit port7&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSCR_ASET(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_RDAH(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_WRAH(0x0)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSCR_AA_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; // auto-acknowledge&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_WS(0x0)&amp;nbsp;&amp;nbsp; // 2 wait states&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_BSTR_MASK&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;| FB_CSCR_BSTW_MASK&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; FB-&amp;gt;CS[0].CSMR = FB_CSMR_BAM(0x7)&amp;nbsp; //Set base address mask for 512K address space&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;| FB_CSMR_V_MASK&amp;nbsp;&amp;nbsp;&amp;nbsp; //Enable cs valid signal&lt;BR /&gt;;&lt;/DIV&gt;&lt;DIV&gt;With this code, read of 8-bit wide data takes 5 FlexBus cycles. However, reference manual (&lt;A href="http://www.nxp.com/assets/documents/data/en/reference-manuals/K22P121M120SF7RM.pdf"&gt;http://www.nxp.com/assets/documents/data/en/reference-manuals/K22P121M120SF7RM.pdf&lt;/A&gt; , page 711) states that it should take only 4 FlexBus cycles.&lt;/DIV&gt;&lt;DIV&gt; &lt;/DIV&gt;&lt;DIV&gt;Is it possible to improve performance of FlexBus read&amp;nbsp;in my case?&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Feb 2017 20:17:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22F-FlexBus-SRAM/m-p/654678#M39949</guid>
      <dc:creator>martindusek</dc:creator>
      <dc:date>2017-02-20T20:17:37Z</dc:date>
    </item>
    <item>
      <title>Re: K22F FlexBus SRAM</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22F-FlexBus-SRAM/m-p/654679#M39950</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;First of all, sorry for the later reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Could you check the Flexbus clock frequency setting?&lt;/P&gt;&lt;P&gt;From the K22 reference manual, the FlexBus clock Max. frequency is 50MHz:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/13799i3D69C421DBF0073F/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Please check System Clock Divider Register 1 SIM_CLKDIV1[OUTDIV3] bits value, which related to Flexbus clock frequency.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Wish it helps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Ma Hui&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Feb 2017 08:10:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22F-FlexBus-SRAM/m-p/654679#M39950</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2017-02-27T08:10:43Z</dc:date>
    </item>
  </channel>
</rss>

