topic Re: EzPort enter sequence in Kinetis Microcontrollers

EzPort enter sequence

alexeyusoltsev — Thu, 16 Feb 2017 08:37:05 GMT

HI!

I am trying to interface frdm-mkl43 with custom made MKV31 board via EzPort.

As I've read I have to pull reset down, pull CS down, pull up reset and after that I'll be in EzPort programming mode.

So I'm trying to read status reg(SPI set to slow speed):

      GPIO_DRV_ClearPinOutput(CS); //CS enable
      GPIO_DRV_ClearPinOutput(RESET);
       GPIO_DRV_SetPinOutput(RESET);
      *&spi_cnt=2; //3 symbolst to sent
      if(SPI1_S&(1<<SPI_S_SPTEF_SHIFT )) SPI1_DL=0x05;
//      while(!(SPI1_S&(1<<SPI_S_SPTEF_SHIFT ))); SPI1_DL=0xBB;
      while(!(SPI1_S&(1<<SPI_S_SPTEF_SHIFT )));SPI1_DL=0x00;
      while(!(SPI1_S&(1<<SPI_S_SPTEF_SHIFT ))); SPI1_DL=0x00;

I got no answer from device. Logic analyzer and SCH are shown in attachment .

The board MKV31 working as it's supposed to-JTAG and other function are fine so it is not any issue with bad soldering or other physical stuff.

Best regards,

Alexey.

Re: EzPort enter sequence

alexeyusoltsev — Thu, 16 Feb 2017 16:28:40 GMT

I've tried "bulk erase". Result is negative-my program is still inside the MCU.

Does EzPort enabled by default on MKV31 MCUs?

Re: EzPort enter sequence

mjbcswitzerland — Thu, 16 Feb 2017 17:02:32 GMT

Alexey

You may get some ideas from here:
http://www.utasker.com/docs/uTasker/uTaskerEzPortCloner.pdf

Regards

Mark

Professional support for Kinetis: http://www.utasker.com/index.html
Remote desktop one-on-one coaching: http://www.utasker.com/services.html
Getting started to expert videos: https://www.youtube.com/results?search_query=utasker+shorts

Re: EzPort enter sequence

alexeyusoltsev — Thu, 16 Feb 2017 17:44:23 GMT

Hi Mark,

Thanks for your fast response! I'll reprogram my KV31 ezport enable bit in the firmware and test it again.

CS->0x6->CS__CS->0x05-0x00(dummy byte)->CS Am I right to expect read non-zero answer after write a dummy bit if everything is ok with ezport?

Update: Checked FOPT security register-both EzPort and bulk erase allowed. Also tested connection point to pins connections one more time. Tomorrow I'll try to change polarity of SPI...dont belive a lot but will give it a try.

Re: EzPort enter sequence

mjbcswitzerland — Thu, 16 Feb 2017 18:02:14 GMT

Hello Alexey

I am sorry but I don't remember the details but the complete code is available in the uTasker project (including a command line interface for testing) if you want to use or copy a working solution.

Regards

Mark

Re: EzPort enter sequence

Kan_Li — Fri, 17 Feb 2017 05:57:25 GMT

Hi Alexey,

Looks like there are some steps missing to enter into EzPort mode, please kindly refer to the following for details.

and you may refer to page 91 of http://cache.nxp.com/assets/documents/data/en/quick-start-guide/KQRUG.pdf?fsrch=1&sr=1&pageNum=1 for more details.

Hope that helps,
Have a great day,
Kan

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Re: EzPort enter sequence

alexeyusoltsev — Sat, 18 Feb 2017 08:51:06 GMT

Hello Kan_Li,

thanks for your response! I've read that pdf. Well I can't see difference with my late logic analyzer screenshot:

it contains SPI+reset signal(chanell 4). Check it up. May be I still have some misunderstanding about cs-reset-cs sequence.

Re: EzPort enter sequence

Kan_Li — Mon, 20 Feb 2017 05:05:51 GMT

Hi Alexey,

Looks like SPI+RESET signals are not enough, the recommended process also polls the RSTOUT pin for determining when to enter the EzPort mode. Please kindly refer to the above code for details.

Hope that helps,
Have a great day,
Kan

Re: EzPort enter sequence

alexeyusoltsev — Mon, 20 Feb 2017 10:50:56 GMT

EzPort entrance debug sequence:

-You need to connect following pins: CS->EzPORT_CS_b; MISO->EZP_DO;MOSI->EZP_DI;SCK->EZP_CLK;GND->GND;GPIO->RESET(!!!same reset as in SWD);

-SPI settings: As it mentioned in the RefMan CPOL=0, CPHA=0 or CPOL=1, CPHA=1 it does mean that it wil work only with CPOL=0, CPHA=0 or if CPU will not answer change it to CPOL=1, CPHA=1(in my case 0-0 was not the case and it worked out only with 1-1, watch attached file)

-Ezport entrance sequence is the following: CS_LOW->RESET_LOW->wait few uS->REST_HIGH->wait few uS->CS_HIGH

To check whether you succeed you have to send "write enable" command(0x06) followed by "read status register"(0x05). Watch attached file. If not answer->change polarity of SPI. If not answer again->check connection and FOPT register of target CPU(EzPort could be disabled but by default from manufaturer it is enabled)

Check attached file.