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    <title>topic K22: FTM2-Clock gate activation in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22-FTM2-Clock-gate-activation/m-p/641053#M38829</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;we want to activate the clock gate for FTM2 on the K22FM1M0VLQ12.&lt;/P&gt;&lt;P&gt;The reference Manual (Rev.5, March 2015) says that the activation bit is in SIM_SCGC3 (Bit 24) *and* SIM_SCGC6 (Bit 26). Also in the device header file both bits are defined.&lt;/P&gt;&lt;P&gt;Which one is the correct one? I don't think I have to set both...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Wolfgang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 01 Dec 2016 13:27:43 GMT</pubDate>
    <dc:creator>noisternig</dc:creator>
    <dc:date>2016-12-01T13:27:43Z</dc:date>
    <item>
      <title>K22: FTM2-Clock gate activation</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22-FTM2-Clock-gate-activation/m-p/641053#M38829</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;we want to activate the clock gate for FTM2 on the K22FM1M0VLQ12.&lt;/P&gt;&lt;P&gt;The reference Manual (Rev.5, March 2015) says that the activation bit is in SIM_SCGC3 (Bit 24) *and* SIM_SCGC6 (Bit 26). Also in the device header file both bits are defined.&lt;/P&gt;&lt;P&gt;Which one is the correct one? I don't think I have to set both...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Br,&lt;/P&gt;&lt;P&gt;Wolfgang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Dec 2016 13:27:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22-FTM2-Clock-gate-activation/m-p/641053#M38829</guid>
      <dc:creator>noisternig</dc:creator>
      <dc:date>2016-12-01T13:27:43Z</dc:date>
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    <item>
      <title>Re: K22: FTM2-Clock gate activation</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22-FTM2-Clock-gate-activation/m-p/641054#M38830</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Wolfgang,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You don't have to set both.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;FTM2 and RNGA can be accessed through both AIPS0 and AIPS1. When accessing through AIPS1, define the clock gate control bits in the SCGC3. When accessing through AIPS0, define the clock gate control bits in SCGC6. &lt;BR /&gt;When accessed through AIPS0, the base address is 4003_A000h and when accessed through AIPS1, the base address is 400B_8000h.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you are using SDK_2.0_MK22FN1M0xxx12, please use the clock gate control bits in the SCGC3.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="FTM_Peripheral_Access_Layer.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9219iB71A046B36179CF0/image-size/large?v=v2&amp;amp;px=999" role="button" title="FTM_Peripheral_Access_Layer.png" alt="FTM_Peripheral_Access_Layer.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Robin&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;---------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Dec 2016 06:01:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K22-FTM2-Clock-gate-activation/m-p/641054#M38830</guid>
      <dc:creator>Robin_Shen</dc:creator>
      <dc:date>2016-12-02T06:01:03Z</dc:date>
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