topic Re: K64 Spi master receive two byte zero from slave in Kinetis Microcontrollers

K64 Spi master receive two byte zero from slave

eliar — Tue, 20 Dec 2016 10:32:25 GMT

I started with K64 DSPI example, any one ( blocking ,interrupt) which is working for start.

This example does not fit to my requirement where the master should only send data and the slave should answer according to that data.

So i modified the example and the fsl_dspi.c to meet my requirements.

the problem i am facing is that when the master send data to the slave

it is received correct in the interrupt of the slave( Note - After disable the fifo for both RX and TX and for master and slave because the fifo of SPI 0 is 4 and the fifo for SPI1 is 1)

But when the slave send data back to the master in the same clock , the first two bytes are 0 and i need to push additional two bytes at the end to get the entire data.

for example

If master send 1,2,3,4 the slave gets 1,2,3,4

the slave then echo it back 1,2,3.4 the master received 0 0 , 1 2,

and for the 3,4 i need to send two additional bytes from the master (dummy 0, so total 6 bytes) to get my 1,2,3,4 back

at the master.

*Again , i disabled the fifo for SPI0 and 1 because they are not equal .

if i am not disabling the fifo , the slave does not get all the data and it need to be pushed also from the master

Can you please help me find how to force the slave output the data from the interrupt:

i reduce the code size at the slave interrupt - so here it is:

while (DSPI_GetStatusFlags(base) & kDSPI_RxFifoDrainRequestFlag)
{

dataReceived = base->POPR;

DSPI_ClearStatusFlags(base, kDSPI_RxFifoDrainRequestFlag);

base->PUSHR_SLAVE = dataReceived

DSPI_ClearStatusFlags(base, kDSPI_TxFifoFillRequestFlag);

}
Thanks!,

Re: K64 Spi master receive two byte zero from slave

Robin_Shen — Thu, 22 Dec 2016 09:21:54 GMT

Hi
I am not sure if you are using the dspi interrupt example in SDK_2.1_MK64FX512xxx12.

After disable the fifo for both RX and TX and for master and slave(See Line 182 and 254), and modify other two place(See Line 50 and 286).
That example seems can run correct on my FRDM-K64F board.

I am a little confused about what you really want.
Do you want to run the master and slave on one FRDM-K64F board or on two separate FRDM-K64F board?
Do you want the slave only send back the data which received from the master?(It seems realize the same function with that example.)

Best Regards,

Robin

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Re: K64 Spi master receive two byte zero from slave

eliar — Sat, 24 Dec 2016 09:15:22 GMT

Hi Robin,

Thanks for your replay.

The function DSPI_SetFifoEnable (false, false) does the same as going to Master init and change it, so we both did the same disable.

The problem is that the DSPI hide the problem because you think you are getting match but beyond the surface the example do what ever to do in order to get all the data.

how could it be that if the fifo are not matched ( 4 and 1) the data is matched?

the upper DSPI code is taking care the data to will arrived ok.

I also did that , i can make it work,

but to make it work , i need to push the data.

The data must be pushed if the fifo are not matched , right?

In my app , i need to parse the data in the slave , process it and then replay to the master, it is not an echo back up.

so the master send data, the slave push it into a fifo and mean while return 0 back.

when data is processed , the master send back a write as a read back command to allow the slave to push the data back.

this procedure cause the master to get two zeros.

so what i did is that i pushed two more bytes from the master to allow the slave to send all the buffer.

So to reproduce the issue, you can do the following:

1. Transfer data from mater to slave ( when fifo are disabled) - print the data on the slave interrupt

you will see that all data arrived ok.

2. in slave interrupt echo it back to the master

3. in master interrupt , print the data you get.

you should see that the first two bytes are zero and to get all the data you need to push additional two bytes from the slave.

Thanks,

Eli

Re: K64 Spi master receive two byte zero from slave

Robin_Shen — Tue, 27 Dec 2016 08:58:40 GMT

Hi Eli,

In order to reproduce the issue, I do the following:
1. Transfer data from mater to slave (when fifo are disabled) - print the data on the slave interrupt see that all data arrived ok.
2. in slave interrupt echo it back to the master
3. in master interrupt , print the data you get.

Observe the spi data by oscilloscope: I see that the first byte return is zero.(The slave has not fill the first received data into the fifo.) In order to get all the data I need to push additional one byte from the slave.(See the attached image "master send and receive slave echo.png")

"In my app , i need to parse the data in the slave , process it and then replay to the master, it is not an echo back up."
The master send a "data ready or not" command and mean while the master get the first zero.
The slave return "data ready or not" command and mean while the master get the status of slave "data ready or not".
So in order to get four data after the data of slave has prepared, the master has to pushed two more bytes.(from the master total 6 bytes)

Best Regards,

Robin

Re: K64 Spi master receive two byte zero from slave

eliar — Tue, 27 Dec 2016 11:32:02 GMT

Hi Robin

So we both see the same issue, ( we need to push additional two bytes)

And according to my understanding it should not happen when the fifo are matched.

data should go back and forth without pushing it.

Eli

Re: K64 Spi master receive two byte zero from slave

eliar — Wed, 28 Dec 2016 13:36:02 GMT

Hi Robin.

So how can we fix that issue?

How can we tell the SPI to work as 1 to 1 byte transfer

Without the need to push data.

I did not tried with SPI 1 to SPI 2 where the fifo there is in hardware 1( may be there its ok)

is it an hardware bug or a feature that need to eliminate?

Thanks,

Eli

Re: K64 Spi master receive two byte zero from slave

Robin_Shen — Thu, 29 Dec 2016 02:14:11 GMT

Hi Eli,
I don't think it's issue.
You can read the section "Receiving Data" in "Serial Peripheral Interface (SPI)" first.

If the master want to receive the really data and meanwhile send data. The slave should fill the fifo before the master send that first data. But it seem impossible in your app: Since the slave need first recevie the data sent from master, then wait the slave process it and then reply to the master.

"How can we tell the SPI to work as 1 to 1 byte transfer"
You can let the slave fill the fifo before the master send that first data. Then watch the spi waveform.

Best Regards,

Robin