<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: KL82Z LPUART flow control in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL82Z-LPUART-flow-control/m-p/619636#M37037</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Vlad,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Pls refer to the section 50.3.6 LPUART Modem IrDA Register (LPUARTx_MODIR) for the RTS/CTS configuration.&lt;/P&gt;&lt;P&gt;Hope it can help you.&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 21 Sep 2016 08:50:47 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2016-09-21T08:50:47Z</dc:date>
    <item>
      <title>KL82Z LPUART flow control</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL82Z-LPUART-flow-control/m-p/619635#M37036</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Guys,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm working with the LPUART on a KL82Z.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;All the LPUART examples shown in SDK 2.0 have&amp;nbsp;no hardware flow control.&amp;nbsp;&lt;SPAN style="line-height: 1.73;"&gt;I need to turn on the hardware flow control, but I cannot find any registers that allow for RTS/CTS to start controling the uart data flow.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I configured&amp;nbsp;the corresponding GPIOs in the MUX but they don't seem to work, there is probably something else I need to do to turn the flow control on. Here's my mux config as generated by the Pins config tool V1.0:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;PORT_SetPinMux(PORTA, PIN14_IDX, kPORT_MuxAlt3); /* PORTA14 (pin 34) is configured as LPUART0_TX */&lt;BR /&gt; PORT_SetPinMux(PORTA, PIN15_IDX, kPORT_MuxAlt3); /* PORTA15 (pin 35) is configured as LPUART0_RX */&lt;BR /&gt; PORT_SetPinMux(PORTD, PIN4_IDX, kPORT_MuxAlt3); /* PORTD4 (pin 77) is configured as LPUART0_RTS_b */&lt;BR /&gt; PORT_SetPinMux(PORTD, PIN5_IDX, kPORT_MuxAlt3); /* PORTD5 (pin 78) is configured as LPUART0_CTS_b */&lt;/P&gt;&lt;P&gt;SIM-&amp;gt;SOPT5 = ((SIM-&amp;gt;SOPT5 &amp;amp;&lt;BR /&gt; (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) /* Mask bits to zero which are setting */&lt;BR /&gt; | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) /* LPUART0 transmit data source select: LPUART0_TX pin */&lt;BR /&gt; | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX) /* LPUART 0 receive data source select: LPUART0_RX pin */&lt;BR /&gt; );&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The configuration structure for the LPUART has no members for turning the hardware flow control on or off. There is no mentioning anywhere in the fsl_lpuart.h file of bit or a register for flow control.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The LPUART0 works fine, it's just that it doesn't care much about the CTS pin and it's not controlling the RTS pin as it should.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The FIFO is not enabled, the tx and rx watermark is set at 0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What am I missing?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for any&amp;nbsp;help!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;UPDATE: I read and again the KL82 Sub-Family Reference Manual, Rev. 2, 1/2016, the only reference I can find is in &amp;nbsp;50.4.2.2 Hardware flow control, a little bit lower, there is a link highlighted in blue saying:&amp;nbsp;See Transceiver driver enable using LPUART_RTS for details. Unfortunately, that link points to nowhere, and there is nowhere in the manual a chapter or a note explaining how to deal with the RTS line or with the "transceiver driver". In my case, the RTS line is high when it should&amp;nbsp;have been low. Anyone bumped into&amp;nbsp;a similar problem?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Sep 2016 15:06:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL82Z-LPUART-flow-control/m-p/619635#M37036</guid>
      <dc:creator>vardelean</dc:creator>
      <dc:date>2016-09-14T15:06:52Z</dc:date>
    </item>
    <item>
      <title>Re: KL82Z LPUART flow control</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL82Z-LPUART-flow-control/m-p/619636#M37037</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Vlad,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Pls refer to the section 50.3.6 LPUART Modem IrDA Register (LPUARTx_MODIR) for the RTS/CTS configuration.&lt;/P&gt;&lt;P&gt;Hope it can help you.&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 21 Sep 2016 08:50:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL82Z-LPUART-flow-control/m-p/619636#M37037</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2016-09-21T08:50:47Z</dc:date>
    </item>
  </channel>
</rss>

