topic Re: Power supply for KL82 in Kinetis Microcontrollers

Power supply for KL82

bopeng — Thu, 02 Mar 2017 11:51:46 GMT

I am going to make a customer board with kl82. I have question about kl82 power supply. In Page 125 of datasheet, it says: • VDDIO_E, which is dedicated to powering PORTE, must be powered after VDD and must be greater than or equal to VDD voltage.

While in page 62, it says

VDDIO is independent of VDD domain and can operate at a voltage independent of VDD. However, it is required that VDD
domain be powered up first prior to VDDIO. VDDIO must never be higher than VDD during power ramp up, or power down.
VDD and VDDIO may ramp together if tied to the same power supply.

VDDIO is an independent voltage supply for PORTE.

I am confused by those two power up requirement. Is it possible for NXP to clarify this point?

Best Regards,

Bo Peng

Re: Power supply for KL82

Hui_Ma — Fri, 03 Mar 2017 07:41:32 GMT

The VDDIO pin provide power to PORT E pins.

PORTE pins has QuadSPI feature to access QSPI flash.

FRDM-KL82Z board hardware design file could be downloaded from here.

Please refer FRDM-KL82Z schematics for the detailed circuit design.

Wish it helps.

Have a great day,
Ma Hui
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Re: Power supply for KL82

bopeng — Fri, 03 Mar 2017 07:52:37 GMT

Yes, I have checked the schematic. But it is different with the requirement with Datasheet. And the datasheet has two different requirements. I want to make sure from NXP which one is correct way.

Re: Power supply for KL82

Hui_Ma — Fri, 03 Mar 2017 08:40:12 GMT

The datasheet page125 indicated VDDIO_E voltage range, which should be greater than or equal to VDD voltage.

The related info also was showed at datasheet table41:

In fact, just using FRDM-KL82Z board as an example:

If VDD was powered with 1.8V, the VDDIO_E voltage can't be powered with 1.8V. For external QSPI Flash powered with 3.3V, VDDIO_E need be powered with 3.3V. VDDIO_E voltage is greater than VDD voltage.

If VDD was powered with 3.3V, the VDDIO_E voltage is same with VDD voltage.

The datasheet page68 shows the two voltage (VDDIO/VDD) power up sequence and power down sequence.

There with requirement: VDDIO must never be higher than VDD during power ramp up, or power down.

If VDD was powered with 1.8V and VDDIO_E was powered with 3.3V, there with requirement that: during 0~1.8V power ramp up, the VDDIO_E voltage couldn't higher than VDD. After VDD reach 1.8V, there without this restriction.

If VDD and VDDIO_E were powered with 3.3V, tie VDD and VDDIO to the same power supply is a reasonable choice.

Wish it helps.