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    <title>Kinetis MicrocontrollersのトピックRe: KV3x -  watchdog issue</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KV3x-watchdog-issue/m-p/593851#M34858</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jaroslav,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please find my comments inline below.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Begin Original Thread] &lt;/P&gt;&lt;P&gt;Conditions/Settings:&lt;/P&gt;&lt;UL style="list-style-type: disc;"&gt;&lt;LI&gt;- Watchdog clock source: LPO at 1 kHz. It is necessary to have independent clock for watchdog which must be different from core clock&lt;/LI&gt;&lt;LI&gt;- Timeout value: 10 s (register value - 10000 at 1 kHz)&lt;/LI&gt;&lt;LI&gt;- Window value: 0&lt;/LI&gt;&lt;LI&gt;- Prescaler value: 0&lt;/LI&gt;&lt;LI&gt;- Watchdog is refreshed periodically in the interrupt triggered by SysTick (IsrSysTick interrupt handler) every 1 ms&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Problem:&lt;/P&gt;&lt;OL style="list-style-type: lower-alpha;"&gt;&lt;LI&gt;a) The watchdog is not refreshed with the period of 1 ms&lt;/LI&gt;&lt;LI&gt;b) How to refresh watchdog during the startup code when it is difficult to keep period larger than 1 ms? Will the watchdog be updated correctly even if the update will happen several times in 1 ms period?&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; You can simply add the refresh sequence in the startup code since this is provided with the SDK.&amp;nbsp; Then I would enable the Systick and turn on the Systick interrupt.&amp;nbsp; In addition, make the Systick interrupt the highest priority interrupt.&amp;nbsp; No other interrupt should have a priority greater than or equal to the Systick interrupt to ensure that the watchdog is serviced correctly.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Notes/Questions:&lt;/P&gt;&lt;OL style="list-style-type: decimal;"&gt;&lt;LI&gt;1) The issue is probably caused by watchdog input clock which is 1 kHz (1 ms)&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; I would think the issue is most likely an improper refresh sequence.&amp;nbsp; Also remember that the two writes to the refresh register must be within 20 bus clock cycles so you probably want to disable interrupts globally while this update is occurring or simply make sure that no interrupt has a priority equal to or greater than the interrupt servicing the watchdog refresh register.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;2) Is it possible to update watchdog anytime regardless of watchdog source clock which means more often than just once in 1 ms period? If so, how does this work?&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt;It is not possible to update the watchdog at any time, there are some restrictions. But you shouldn’t be updating the watchdog, you should be refreshing it.&amp;nbsp; It IS possible to refresh the watchdog any time but you must write the correct sequences to the WDOG_REFRESH register.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;3) Since it is synchronous design the watchdog peripheral module is probably triggered with 1 kHz clock.&lt;/LI&gt;&lt;LI&gt;4) How can we manage watchdog update in startup code? It is difficult to keep 1 ms time frame. It is changing with startup code complexity and it is application dependent&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; The watchdog can be serviced anytime.&amp;nbsp; I would modify the SystemInit function to start the Systick timer and turn on its interrupt.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 11 Aug 2016 18:43:55 GMT</pubDate>
    <dc:creator>chris_brown</dc:creator>
    <dc:date>2016-08-11T18:43:55Z</dc:date>
    <item>
      <title>KV3x -  watchdog issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KV3x-watchdog-issue/m-p/593850#M34857</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;Hi Chris,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A href="http://www.macmillandictionary.com/dictionary/british/sorry" title="sorry"&gt;&lt;SPAN style="color:windowtext;text-decoration:none"&gt;Sorry&lt;/SPAN&gt;&lt;/A&gt;&amp;nbsp;to&amp;nbsp;&lt;A href="http://www.macmillandictionary.com/dictionary/british/bother_1" title="bother"&gt;&lt;SPAN style="color:windowtext;text-decoration:none"&gt;bother&lt;/SPAN&gt;&lt;/A&gt;&amp;nbsp;you, but I would like to ask you for help with watchdog behavior on KV3x devices.&lt;/P&gt;&lt;P&gt;Customer would like to use watchdog on KV3x and observed issue with integrating it into his application.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Conditions/Settings:&lt;/P&gt;&lt;P style="mso-list:l1 level1 lfo1"&gt;&lt;SPAN style="mso-list:Ignore"&gt;-&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Watchdog clock source: LPO at 1 kHz. It is necessary to have independent clock for watchdog which must be different from core clock&lt;/P&gt;&lt;P style="mso-list:l1 level1 lfo1"&gt;&lt;SPAN style="mso-list:Ignore"&gt;-&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Timeout value: 10 s (register value - 10000 at 1 kHz)&lt;/P&gt;&lt;P style="mso-list:l1 level1 lfo1"&gt;&lt;SPAN style="mso-list:Ignore"&gt;-&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Window value: 0&lt;/P&gt;&lt;P style="mso-list:l1 level1 lfo1"&gt;&lt;SPAN style="mso-list:Ignore"&gt;-&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Prescaler value: 0&lt;/P&gt;&lt;P style="mso-list:l1 level1 lfo1"&gt;&lt;SPAN style="mso-list:Ignore"&gt;-&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Watchdog is refreshed periodically in the interrupt triggered by SysTick (IsrSysTick interrupt handler) every 1 ms&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Problem:&lt;/P&gt;&lt;P style="mso-list:l0 level1 lfo2"&gt;&lt;SPAN style="mso-list:Ignore"&gt;a)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; The watchdog is not refreshed with the period of 1 ms&lt;/P&gt;&lt;P style="mso-list:l0 level1 lfo2"&gt;&lt;SPAN style="mso-list:Ignore"&gt;b)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; How to refresh watchdog during the startup code when it is difficult to keep period larger than 1 ms? Will the watchdog be updated correctly even if the update will happen several times in 1 ms period?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Notes/Questions:&lt;/P&gt;&lt;P style="mso-list:l2 level1 lfo3"&gt;&lt;SPAN style="mso-list:Ignore"&gt;1)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; The issue is probably caused by watchdog input clock which is 1 kHz (1 ms)&lt;/P&gt;&lt;P style="mso-list:l2 level1 lfo3"&gt;&lt;SPAN style="mso-list:Ignore"&gt;2)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Is it possible to update watchdog anytime regardless of watchdog source clock which means more often than just once in 1 ms period? If so, how does this work?&lt;/P&gt;&lt;P style="mso-list:l2 level1 lfo3"&gt;&lt;SPAN style="mso-list:Ignore"&gt;3)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; Since it is synchronous design the watchdog peripheral module is probably triggered with 1 kHz clock.&lt;/P&gt;&lt;P style="mso-list:l2 level1 lfo3"&gt;&lt;SPAN style="mso-list:Ignore"&gt;4)&lt;SPAN style="font:7.0pt  Times New Roman "&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt; How can we manage watchdog update in startup code? It is difficult to keep 1 ms time frame. It is changing with startup code complexity and it is application dependent&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;I&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;--&lt;/SPAN&gt;&lt;/I&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Best regards&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Jaroslav&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"&gt;&lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;The information contained in this communication has been classified as:&lt;/SPAN&gt; &lt;SPAN style="font-size:12.0pt;font-family: Times New Roman ,serif;color:#1F497D"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;[ ] General Business Information&lt;/SPAN&gt; &lt;SPAN style="font-size:12.0pt;font-family: Times New Roman ,serif;color:#1F497D"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;[x] NXP&lt;/SPAN&gt; &lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;Internal Use Only&lt;/SPAN&gt; &lt;SPAN style="font-size:12.0pt;font-family: Times New Roman ,serif;color:#1F497D"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;[ ] NXP&lt;/SPAN&gt; &lt;SPAN style="font-size:10.0pt;font-family: Arial CE ,sans-serif;color:#1F497D"&gt;Confidential Proprietary&lt;/SPAN&gt; &lt;/P&gt;&lt;P style="line-height:150%"&gt;&lt;SPAN style="font-size:12.0pt;line-height:150%;color:#1F497D"&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/skins/images/62DA35B4C7D7DD28E351E6014238899E/responsive_peak/images/image_not_found.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;SPAN lang="CS" style="font-size:12.0pt;line-height:150%;color:#1F497D"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Jaroslav Lepka&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;STRONG&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;color:#1F497D"&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Principal Engineer, Motor Control &amp;amp; Safety Team Leader&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Security &amp;amp; Connectivity, Microcontrollers&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;NXP Semiconductors&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;1. maje 1009&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;75661 Rožnov pod Radhoštěm&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Czech Republic&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Phone: +420 571 665 132&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Cell:&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; +420 604 291 188&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-size:10.0pt;font-family: Arial ,sans-serif;color:#1F497D"&gt;Email: &lt;A href="mailto:jaroslav.lepka@nxp.com"&gt;&lt;SPAN style="color:blue"&gt;jaroslav.lepka@nxp.com&lt;/SPAN&gt;&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN lang="CS" style="font-family: Arial ,sans-serif;color:#1F497D"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size:12.0pt;color:#1F497D"&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/skins/images/62DA35B4C7D7DD28E351E6014238899E/responsive_peak/images/image_not_found.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;SPAN lang="CS" style="font-size:12.0pt;color:#1F497D"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Aug 2016 15:08:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KV3x-watchdog-issue/m-p/593850#M34857</guid>
      <dc:creator>chris_brown</dc:creator>
      <dc:date>2016-08-11T15:08:29Z</dc:date>
    </item>
    <item>
      <title>Re: KV3x -  watchdog issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KV3x-watchdog-issue/m-p/593851#M34858</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jaroslav,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please find my comments inline below.&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[Begin Original Thread] &lt;/P&gt;&lt;P&gt;Conditions/Settings:&lt;/P&gt;&lt;UL style="list-style-type: disc;"&gt;&lt;LI&gt;- Watchdog clock source: LPO at 1 kHz. It is necessary to have independent clock for watchdog which must be different from core clock&lt;/LI&gt;&lt;LI&gt;- Timeout value: 10 s (register value - 10000 at 1 kHz)&lt;/LI&gt;&lt;LI&gt;- Window value: 0&lt;/LI&gt;&lt;LI&gt;- Prescaler value: 0&lt;/LI&gt;&lt;LI&gt;- Watchdog is refreshed periodically in the interrupt triggered by SysTick (IsrSysTick interrupt handler) every 1 ms&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Problem:&lt;/P&gt;&lt;OL style="list-style-type: lower-alpha;"&gt;&lt;LI&gt;a) The watchdog is not refreshed with the period of 1 ms&lt;/LI&gt;&lt;LI&gt;b) How to refresh watchdog during the startup code when it is difficult to keep period larger than 1 ms? Will the watchdog be updated correctly even if the update will happen several times in 1 ms period?&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; You can simply add the refresh sequence in the startup code since this is provided with the SDK.&amp;nbsp; Then I would enable the Systick and turn on the Systick interrupt.&amp;nbsp; In addition, make the Systick interrupt the highest priority interrupt.&amp;nbsp; No other interrupt should have a priority greater than or equal to the Systick interrupt to ensure that the watchdog is serviced correctly.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Notes/Questions:&lt;/P&gt;&lt;OL style="list-style-type: decimal;"&gt;&lt;LI&gt;1) The issue is probably caused by watchdog input clock which is 1 kHz (1 ms)&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; I would think the issue is most likely an improper refresh sequence.&amp;nbsp; Also remember that the two writes to the refresh register must be within 20 bus clock cycles so you probably want to disable interrupts globally while this update is occurring or simply make sure that no interrupt has a priority equal to or greater than the interrupt servicing the watchdog refresh register.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;2) Is it possible to update watchdog anytime regardless of watchdog source clock which means more often than just once in 1 ms period? If so, how does this work?&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt;It is not possible to update the watchdog at any time, there are some restrictions. But you shouldn’t be updating the watchdog, you should be refreshing it.&amp;nbsp; It IS possible to refresh the watchdog any time but you must write the correct sequences to the WDOG_REFRESH register.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;3) Since it is synchronous design the watchdog peripheral module is probably triggered with 1 kHz clock.&lt;/LI&gt;&lt;LI&gt;4) How can we manage watchdog update in startup code? It is difficult to keep 1 ms time frame. It is changing with startup code complexity and it is application dependent&lt;STRONG&gt;&lt;EM style="color: #1f497d;"&gt;[CB] &lt;/EM&gt;&lt;/STRONG&gt;&lt;SPAN style="color: #1f497d;"&gt; The watchdog can be serviced anytime.&amp;nbsp; I would modify the SystemInit function to start the Systick timer and turn on its interrupt.&amp;nbsp; &lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 11 Aug 2016 18:43:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KV3x-watchdog-issue/m-p/593851#M34858</guid>
      <dc:creator>chris_brown</dc:creator>
      <dc:date>2016-08-11T18:43:55Z</dc:date>
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