<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Interfacing 16-bit SDRAM on K65 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591710#M34809</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Markus!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried you're idea and it didn't change anything.&lt;/P&gt;&lt;P&gt;When looking in the reference manual for the SDRAM I get that the CAS-latency is set on A6-A4, so 0x20 would refer to A5 and CAS = 2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But I'm thankful for the tip!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Anton Svensson&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 22 Aug 2016 10:40:50 GMT</pubDate>
    <dc:creator>anton_svensson</dc:creator>
    <dc:date>2016-08-22T10:40:50Z</dc:date>
    <item>
      <title>Interfacing 16-bit SDRAM on K65</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591706#M34805</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I'm having problems interfacing a 16-bit SDRAM on the k65.&lt;/P&gt;&lt;P&gt;The SDRAM being used is an &lt;SPAN style="color: #000000; font-family: arial, helvetica, sans-serif; font-size: x-small;"&gt;MT48LC4M16&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;The SDRAM is connected as in the picture attached.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The problem I get is when I try to access the SDRAM, with an 32 bit access not with 16 or 8 bit, and writing the prechargeall command I get some sort of exception and landing at 0x10066958.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When accessing with 16/8 bit I won't get any information to the SDRAM, writing and reading all result in 0x0 in values.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Anyone had similar problems?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Anton&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337703"&gt;Sdram.cpp.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jun 2016 11:23:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591706#M34805</guid>
      <dc:creator>anton_svensson</dc:creator>
      <dc:date>2016-06-30T11:23:54Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing 16-bit SDRAM on K65</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591707#M34806</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Anton,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you refer to the documentation and code based on K65:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-330306"&gt;How to access SDRAM based on K65 SDRAM controller&lt;/A&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Pls refer to the code, if you still have issue, pls update here.&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;Xiangjun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Jul 2016 08:01:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591707#M34806</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2016-07-06T08:01:10Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing 16-bit SDRAM on K65</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591708#M34807</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've used that documentation and code as an example.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The weird behaviour I have at this point is that it seems that I can write to the lowest bit when accessing as a 16-bit device through the SDRAM controller. However it seems like I only can access one adress.&lt;/P&gt;&lt;P&gt;A write of 0xFFFF will result in a read of 0x1.&lt;/P&gt;&lt;P&gt;A write of 0xFF0 will result in read of 0x0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I try it as a 32-bit device in the controller, I can write to the lowest 16 bits, but still only on one adress as it seems.&lt;/P&gt;&lt;P&gt;A write of 0xFFFF will result in a read of 0xFFFF.&lt;/P&gt;&lt;P&gt;A write of 0x1234 will result in a read of 0x1234&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Anton Svensson&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Aug 2016 10:22:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591708#M34807</guid>
      <dc:creator>anton_svensson</dc:creator>
      <dc:date>2016-08-19T10:22:08Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing 16-bit SDRAM on K65</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591709#M34808</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt; Hey, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;i think you have a&amp;nbsp; timing mismatch between the controller and the SD-RAM. This is not setting a CAS-Latency of two:&lt;/P&gt;&lt;P&gt;bP = (UINT8 *) (SDRAMADDR + 0x20);&lt;/P&gt;&lt;P&gt;Try 0x400 instead.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 19 Aug 2016 10:36:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591709#M34808</guid>
      <dc:creator>Masmiseim</dc:creator>
      <dc:date>2016-08-19T10:36:47Z</dc:date>
    </item>
    <item>
      <title>Re: Interfacing 16-bit SDRAM on K65</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591710#M34809</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Markus!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tried you're idea and it didn't change anything.&lt;/P&gt;&lt;P&gt;When looking in the reference manual for the SDRAM I get that the CAS-latency is set on A6-A4, so 0x20 would refer to A5 and CAS = 2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But I'm thankful for the tip!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Anton Svensson&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Aug 2016 10:40:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Interfacing-16-bit-SDRAM-on-K65/m-p/591710#M34809</guid>
      <dc:creator>anton_svensson</dc:creator>
      <dc:date>2016-08-22T10:40:50Z</dc:date>
    </item>
  </channel>
</rss>

