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    <title>topic Re: EEPROM partitioning in MK20DX256VLL10 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548048#M33399</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ping,&lt;BR /&gt;&lt;BR /&gt;Does this mean this device does have a Program Partition command and it's not listed or that the device doesn't have a Program Partition command?&lt;BR /&gt;&lt;BR /&gt;If it does what's the hexadecimal value for it and if it's 0x80 why am I receiving an ACCERR error&lt;BR /&gt;&lt;BR /&gt;Many thanks,&lt;BR /&gt;Joshua&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 30 Aug 2016 08:36:19 GMT</pubDate>
    <dc:creator>xenoamor</dc:creator>
    <dc:date>2016-08-30T08:36:19Z</dc:date>
    <item>
      <title>EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548045#M33396</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hey guys. I've had a pile of boards made up using the MK20DX256VLL10 device. At the time the software for these were not complete and now I have found that whenever I call SetFlexRAMFunction() I get an ACCERR error in the FSTAT register. I am correctly checking if the device is already partitioned by checking that GetFlexNVMPartitionCode() returns FLEX_NVM_NOT_PARTITIONED, which it does. I have tried the erase and unlock kinetis commands using a segger Jlink. Both yield the same results.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the MK20DX256VLH7 device, which I have had the EEPROM working on, this method works.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Looking deeper into it I notice that in the table: 'Flash Commands by Mode' in the datasheet: &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FK20P100M100SF2V2RM.pdf%3Ffasp%3D1%26WT_TYPE%3DReference%2520Manuals%26WT_VENDOR%3DFREESCALE%26WT_FILE_FORMAT%3Dpdf%26WT_ASSET%3DDocumentation%26fileExt%3D.pdf" rel="nofollow" target="_blank"&gt;http://www.nxp.com/files/32bit/doc/ref_manual/K20P100M100SF2V2RM.pdf?fasp=1&amp;amp;WT_TYPE=Reference%20Manuals&amp;amp;WT_VENDOR=FREESCALE&amp;amp;WT_FILE_FORMAT=pdf&amp;amp;WT_ASSET=Documentation&amp;amp;fileExt=.pdf&lt;/A&gt;&lt;SPAN&gt; the usual 0x80: Program Partition command is missing.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Has the MK20DX256VLL10 device got a unique way to partition the EEPROM? The device specification clearly states a 4kB potential EEPROM space: &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fwebapp%2Fsearch.partparamdetail.framework%3FPART_NUMBER%3DMK20DX256VLL10" rel="nofollow" target="_blank"&gt;https://www.nxp.com/webapp/search.partparamdetail.framework?PART_NUMBER=MK20DX256VLL10&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any pointers to how to create/use the EEPROM space in this device would be much appreciated&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Many thanks,&lt;/P&gt;&lt;P&gt;Joshua&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Aug 2016 13:26:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548045#M33396</guid>
      <dc:creator>xenoamor</dc:creator>
      <dc:date>2016-08-22T13:26:30Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548046#M33397</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joshua,&lt;/P&gt;&lt;P&gt;Thanks for your sharing.&lt;/P&gt;&lt;P&gt;And I'll contact with the AE about the issue and inform you ASAP if we work it out.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Aug 2016 02:58:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548046#M33397</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-08-25T02:58:42Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548047#M33398</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joshua,&lt;/P&gt;&lt;P&gt;After confirmed with the doc team, the K20P100M100SF2V2RM actually has missed the &lt;SPAN&gt;Program Partition command.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And I'd like to know what is going on about the issue now.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 29 Aug 2016 02:15:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548047#M33398</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-08-29T02:15:47Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548048#M33399</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ping,&lt;BR /&gt;&lt;BR /&gt;Does this mean this device does have a Program Partition command and it's not listed or that the device doesn't have a Program Partition command?&lt;BR /&gt;&lt;BR /&gt;If it does what's the hexadecimal value for it and if it's 0x80 why am I receiving an ACCERR error&lt;BR /&gt;&lt;BR /&gt;Many thanks,&lt;BR /&gt;Joshua&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Aug 2016 08:36:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548048#M33399</guid>
      <dc:creator>xenoamor</dc:creator>
      <dc:date>2016-08-30T08:36:19Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548049#M33400</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Joshua,&lt;/P&gt;&lt;P&gt;Yes, the MK20DX256VLL10 support the Program Partition command (0x80).&lt;/P&gt;&lt;P&gt;And I'd like to suggest that you can utilize the standard software driver which provides particular function to execute the command and the C90TFS Flash Driver's link is below.&lt;/P&gt;&lt;P&gt;cache.nxp.com/files/microcontrollers/software/device_drivers/C90TFS-FLASH-DRIVER-DEVD.exe?fsrch=1&amp;amp;sr=3&amp;amp;pageNum=1&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Aug 2016 01:43:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548049#M33400</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-08-31T01:43:37Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548050#M33401</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for all the help guys. I ended up using this smaller/simple eeprom library to handle this. For future reference this is the code snippet:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;#include "Cpu.h"&lt;BR /&gt;#include "FTFL_PDD.h"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#define FlexRAM ((uint8_t *)0x14000000)&lt;BR /&gt;#define EEPROM_SIZE 32 // 32 Bytes&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#if (EEPROM_SIZE == 2048)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 35000 writes/byte or 70000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x33&lt;BR /&gt;#elif (EEPROM_SIZE == 1024)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 75000 writes/byte or 150000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x34&lt;BR /&gt;#elif (EEPROM_SIZE == 512)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 155000 writes/byte or 310000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x35&lt;BR /&gt;#elif (EEPROM_SIZE == 256)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 315000 writes/byte or 630000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x36&lt;BR /&gt;#elif (EEPROM_SIZE == 128)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 635000 writes/byte or 1270000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x37&lt;BR /&gt;#elif (EEPROM_SIZE == 64)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 1275000 writes/byte or 2550000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x38&lt;BR /&gt;#elif (EEPROM_SIZE == 32)&amp;nbsp;&amp;nbsp; &amp;nbsp;// 2555000 writes/byte or 5110000 writes/word&lt;BR /&gt;&amp;nbsp; #define EEESIZE 0x39&lt;BR /&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;// Prototypes&lt;BR /&gt;void &amp;nbsp;&amp;nbsp; &amp;nbsp;eeprom_init();&lt;BR /&gt;uint8_t &amp;nbsp;&amp;nbsp; &amp;nbsp;eeprom_read_byte(uint8_t addr);&lt;BR /&gt;void &amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;eeprom_write_byte(uint8_t addr, uint8_t value);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void eeprom_init() {&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint32_t count=0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint16_t do_flash_cmd[] = {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xf06f, 0x037f, 0x7003, 0x7803,&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;0xf013, 0x0f80, 0xd0fb, 0x4770};&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint8_t status;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (FTFL_PDD_GetRAMReady(FTFL_BASE_PTR)) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;// FlexRAM is configured as traditional RAM&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;// We need to reconfigure for EEPROM usage&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;*(uint8_t*)&amp;amp;FTFL_FCCOB0_REG(FTFL_BASE_PTR) = 0x80; // PGMPART = Program Partition Command&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;*(uint8_t*)&amp;amp;FTFL_FCCOB4_REG(FTFL_BASE_PTR) = EEESIZE; // EEPROM Size&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;*(uint8_t*)&amp;amp;FTFL_FCCOB5_REG(FTFL_BASE_PTR) = 0x03; // 0K for Dataflash, 32K for EEPROM backup&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;Cpu_DisableInt();&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;// do_flash_cmd() must execute from RAM.&amp;nbsp; Luckily the C syntax is simple...&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;(*((void (*)(volatile uint8_t *))((uint32_t)do_flash_cmd | 1)))(&amp;amp;FTFL_FSTAT_REG(FTFL_BASE_PTR));&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;Cpu_EnableInt();&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;status = FTFL_FSTAT_REG(FTFL_BASE_PTR);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (status &amp;amp; 0x70) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;FTFL_FSTAT_REG(FTFL_BASE_PTR) = (status &amp;amp; 0x70);&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;return; // error&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;// wait for eeprom to become ready (is this really necessary?)&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (++count &amp;gt; 20000) break;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;uint8_t eeprom_read_byte(uint8_t addr) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint32_t offset = (uint32_t)addr;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (offset &amp;gt;= EEPROM_SIZE) return 0;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;return FlexRAM[offset];&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void eeprom_write_byte(uint8_t addr, uint8_t value) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;uint32_t offset = (uint32_t)addr;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (offset &amp;gt;= EEPROM_SIZE) return;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) eeprom_init();&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;if (FlexRAM[offset] != value) {&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;FlexRAM[offset] = value;&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;while (!(FTFL_PDD_GetEEEReady(FTFL_BASE_PTR))) {}&lt;BR /&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;}&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Sep 2016 10:34:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548050#M33401</guid>
      <dc:creator>xenoamor</dc:creator>
      <dc:date>2016-09-02T10:34:37Z</dc:date>
    </item>
    <item>
      <title>Re: EEPROM partitioning in MK20DX256VLL10</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548051#M33402</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi JB,&lt;/P&gt;&lt;P&gt;I tested your code eeprom ok,&lt;/P&gt;&lt;P&gt;new question:&lt;/P&gt;&lt;P&gt;how to Set address base to eeprom?&lt;/P&gt;&lt;P&gt;example:&lt;/P&gt;&lt;P&gt;#define _base 0x8000 or 0xE000...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks,&lt;/P&gt;&lt;P&gt;Carlos.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Mar 2017 19:34:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/EEPROM-partitioning-in-MK20DX256VLL10/m-p/548051#M33402</guid>
      <dc:creator>CCandido</dc:creator>
      <dc:date>2017-03-01T19:34:59Z</dc:date>
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