topic Re: GPIO protection in Kinetis Microcontrollers

GPIO protection

tejpalsingh — Thu, 18 Aug 2016 08:27:42 GMT

According to datasheet K10P144M100SF2V2 GPIO only have clamp diode to VSS. I need EOS protection up to +24V.

I can experiment and find what works but I will like to understand GPIO characteristics.

Can I use a series 10K resistor for protection?

Will it cause latchup because 24V > Max 5~5.5V even though it can't drive latch up current of 100ma?

What will be the voltage at pin?

What is the reverse break down voltage of clamp diode?

Will I I definitely need another clamp diode to VDD as well ? Why?

Re: GPIO protection

Hui_Ma — Tue, 23 Aug 2016 08:19:56 GMT

K10 100MHz product all GPIO pins have 5 V tolerance.

All 5 V tolerant digital I/O pins are internally clamped to VSS through an ESD protection diode. There is no diode connection to VDD.

Circuit design and PCB layout are fundamental in preventing EOS conditions from reaching the device.

There are several publications that offer great advice on properly designing circuits to prevent overstress conditions.

The recommendations in the publications concentrate on the following:

• Clean VCC and VSS Supplies:

- Avoid excessive ringing and power-up overshoot/undershoot

• Controlled VCC Ramp at Power-up and Power-Down:

- Too fast power-up or power-down could cause excessive inrush currents through the circuit

• Proper Power/Ground:

- Avoid ground loops and ground differentials

• Correct Decoupling Capacitor Values:

- Essential for filtering high-frequency spikes

• Data Bus Contentions

• Connecting External Cable to an Unprotected I/O Port

• Proper Component Placement

• Short Trace Lengths

K10 most GPIO pin are in high impedance status during power up.

Using a current-limiting resistor and a ferrite bead with a capacitor to ground will limit the energy transferred to a pin during an EOS event.

Wish it helps.

Have a great day,
Ma Hui
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Re: GPIO protection

tejpalsingh — Wed, 24 Aug 2016 00:06:25 GMT

Ma Hui,

I will like to thank you for replying and also thanks for a polite and long reply with known generic information.

BTW I have read some of your replies here and I have experience in interacting with many semi vendor support sites. So I am aware what kind I support I expect.

I don't know what is your official association with NXP and if this reply is on behalf of NXP.

If this is official response from NXP support staff then it is pathetic and useless generic response.

If you are replying as a community gesture. I have a suggestion for you. Please only reply if you have specific answers.

But NXP is not exception response at most vendor community sites is poor and sometimes I have to get answers by approaching official customer support.

Regards,

Tejpal

Re: GPIO protection

Hui_Ma — Fri, 26 Aug 2016 04:46:05 GMT

Only using a series 10K resistor for EOS protection is not permitted.
For Digital inputs only have a diode to VSS, allowing negative injection but not positive injection
Please check below picture about K10 GPIO pin protection circuit:

Dig Pad for digital function pin, such GPIO pin; Ana Pad for analog function pin, such as ADC channel.

The other recommend way is using a TVS diode between 10K serial resistor with K10 GPIO pin.

Wish it helps.