topic Re: Custom K24 board SWD failure in Kinetis Microcontrollers

Custom K24 board SWD failure

jacobjennings — Thu, 16 Jun 2016 01:33:43 GMT

I designed a custom K24 board which is fairly simple:

- J-Link Segger header

- All pins broken out

- Power routed

- Decoupling caps

- Optional pullups for reset and SWD data, optional pulldown for SWD clock

https://oshpark.com/shared_projects/IVFTmKsz

Using 200 Khz SWD speed, have EZP_CS_b pulled high. Tried at 1.8 and 3.3v both.

I have populated:

SWD data pullup: 4k7

Reset pullup:4k7

Clock pulldown: 4k7

Clock capacitor to gnd: 560pf

In the middle of the launch process, it fails back to a reset loop.

Channel 0: Reset

Channel 1: Data

Channel 2: Clock

Full view:

Zoomed in on where it starts the reset loop again:

The 'Trailing bits' section is where the reset loop starts:

Zoomed out a bit around the area where the reset loop starts:

I assembled a second board which exhibited the same failure. What is going wrong?

Dump from J-Link

SEGGER J-Link GDB Server V5.10n Command Line Version

JLinkARM.dll V5.10n (DLL compiled Feb 19 2016 18:41:43)

-----GDB Server start settings-----

GDBInit file: none

GDB Server Listening port: 2331

SWO raw output listening port: 2332

Terminal I/O port: 2332

Accept remote connection: localhost only

Generate logfile: off

Verify download: on

Init regs on start: on

Silent mode: off

Single run mode: on

Target connection timeout: 0 ms

------J-Link related settings------

J-Link Host interface: USB

J-Link script: none

J-Link settings file: none

------Target related settings------

Target device: MK24FN1M0xxx12

Target interface: SWD

Target interface speed: 200kHz

Target endian: little

Connecting to J-Link...

J-Link is connected.

Firmware: J-Link V9 compiled Apr 22 2016 11:47:06

Hardware: V9.30

S/N: 59306698

Feature(s): GDB

Checking target voltage...

Target voltage: 1.77 V

Listening on TCP/IP port 2331

Connecting to target...Connected to target

Waiting for GDB connection...Connected to 127.0.0.1

Reading all registers

Read 4 bytes @ address 0x00000000 (Data = 0xFFFFFFFF)

Target interface speed set to 200 kHz

Resetting target

Halting target CPU...

...Target halted (PC = 0xFFFFFFFE)

R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000

R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000

R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000

R12= 00000000, R13= FFFFFFFC, MSP= FFFFFFFC, PSP= 00000000

R14(LR) = FFFFFFFF, R15(PC) = FFFFFFFE

XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000

CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00

Reading all registers

Target interface speed set to 200 kHz

Flash breakpoints enabled

Semi-hosting enabled (Handle on BKPT)

Semihosting I/O set to TELNET Client

Downloading 16 bytes @ address 0x00000400 - Verified OK

Downloading 1024 bytes @ address 0x1FFF0000Comparing flash [....................] Done.

Verifying flash [....................] Done.

- Verified OK

Downloading 16112 bytes @ address 0x1FFF0400 - Verified OK

Downloading 16144 bytes @ address 0x1FFF42F0 - Verified OK

Downloading 1000 bytes @ address 0x1FFF8200 - Verified OK

Downloading 8 bytes @ address 0x1FFF85E8 - Verified OK

Downloading 4 bytes @ address 0x1FFF85F0 - Verified OK

Downloading 4 bytes @ address 0x1FFF85F4 - Verified OK

Downloading 116 bytes @ address 0x1FFF85F8 - Verified OK

Writing register (PC = 0x1fff04c8)

Read 4 bytes @ address 0x1FFF04C8 (Data = 0x4809B672)

Read 2 bytes @ address 0x1FFF2452 (Data = 0xF004)

Resetting target

Halting target CPU...

...Target halted (PC = 0xFFFFFFFE)

Read 2 bytes @ address 0x1FFF2452 (Data = 0xF004)

R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000

R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000

R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000

R12= 00000000, R13= FFFFFFFC, MSP= FFFFFFFC, PSP= 00000000

R14(LR) = FFFFFFFF, R15(PC) = FFFFFFFE

XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000

CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00

Reading all registers

WARNING: Failed to read memory @ address 0xFFFFFFFE

Setting breakpoint @ address 0x1FFF2452, Size = 2, BPHandle = 0x0001

Starting target CPU...

ERROR: Can not read register 15 (R15) while CPU is running

...Target halted (PC = 0x00000000)

Reading all registers

ERROR: Can not read register 0 (R0) while CPU is running

ERROR: Can not read register 1 (R1) while CPU is running

ERROR: Can not read register 2 (R2) while CPU is running

ERROR: Can not read register 3 (R3) while CPU is running

ERROR: Can not read register 4 (R4) while CPU is running

ERROR: Can not read register 5 (R5) while CPU is running

ERROR: Can not read register 6 (R6) while CPU is running

ERROR: Can not read register 7 (R7) while CPU is running

ERROR: Can not read register 8 (R8) while CPU is running

ERROR: Can not read register 9 (R9) while CPU is running

ERROR: Can not read register 10 (R10) while CPU is running

ERROR: Can not read register 11 (R11) while CPU is running

ERROR: Can not read register 12 (R12) while CPU is running

ERROR: Can not read register 13 (R13) while CPU is running

ERROR: Can not read register 14 (R14) while CPU is running

ERROR: Can not read register 15 (R15) while CPU is running

ERROR: Can not read register 16 (XPSR) while CPU is running

ERROR: Can not read register 17 (MSP) while CPU is running

ERROR: Can not read register 18 (PSP) while CPU is running

ERROR: Can not read register 24 (PRIMASK) while CPU is running

ERROR: Can not read register 25 (BASEPRI) while CPU is running

ERROR: Can not read register 26 (FAULTMASK) while CPU is running

ERROR: Can not read register 27 (CONTROL) while CPU is running

ERROR: Can not read register 32 (FPSCR) while CPU is running

ERROR: Can not read register 33 (FPS0) while CPU is running

ERROR: Can not read register 34 (FPS1) while CPU is running

ERROR: Can not read register 35 (FPS2) while CPU is running

ERROR: Can not read register 36 (FPS3) while CPU is running

ERROR: Can not read register 37 (FPS4) while CPU is running

ERROR: Can not read register 38 (FPS5) while CPU is running

ERROR: Can not read register 39 (FPS6) while CPU is running

ERROR: Can not read register 40 (FPS7) while CPU is running

ERROR: Can not read register 41 (FPS8) while CPU is running

ERROR: Can not read register 42 (FPS9) while CPU is running

ERROR: Can not read register 43 (FPS10) while CPU is running

ERROR: Can not read register 44 (FPS11) while CPU is running

ERROR: Can not read register 45 (FPS12) while CPU is running

ERROR: Can not read register 46 (FPS13) while CPU is running

ERROR: Can not read register 47 (FPS14) while CPU is running

ERROR: Can not read register 48 (FPS15) while CPU is running

ERROR: Can not read register 49 (FPS16) while CPU is running

ERROR: Can not read register 50 (FPS17) while CPU is running

ERROR: Can not read register 51 (FPS18) while CPU is running

ERROR: Can not read register 52 (FPS19) while CPU is running

ERROR: Can not read register 53 (FPS20) while CPU is running

ERROR: Can not read register 54 (FPS21) while CPU is running

ERROR: Can not read register 55 (FPS22) while CPU is running

ERROR: Can not read register 56 (FPS23) while CPU is running

ERROR: Can not read register 57 (FPS24) while CPU is running

ERROR: Can not read register 58 (FPS25) while CPU is running

ERROR: Can not read register 59 (FPS26) while CPU is running

ERROR: Can not read register 60 (FPS27) while CPU is running

ERROR: Can not read register 61 (FPS28) while CPU is running

ERROR: Can not read register 62 (FPS29) while CPU is running

ERROR: Can not read register 63 (FPS30) while CPU is running

ERROR: Can not read register 64 (FPS31) while CPU is running

Removing breakpoint @ address 0x1FFF2452, Size = 2

Read 4 bytes @ address 0x00000000 (Data = 0xFFFFFFFF)

Re: Custom K24 board SWD failure

BlackNight — Fri, 17 Jun 2016 06:30:42 GMT

Hi Jacob,

I notice that your SWD target inferface speed is rather low (not sure how much it matters), but I'm using 1000 kHz (you have 200 kHz). I have pasted an example session on my side (FRDM-K64F).

The other thing which might be relevant:

>>>Target voltage: 1.77 V

Is it really that low?

I have used the circuit/wiring as on the FRDM boards with my design with no problems so far:

- 100n C on Reset to GND

- 10k pullup on Reset to VCC

- SWD CLK and DIO directly to the MCU pins (no pullups and no caps)

Erich

SEGGER J-Link GDB Server V5.41h (beta) Command Line Version

JLinkARM.dll V5.41h (DLL compiled Jun 10 2016 17:44:13)

-----GDB Server start settings-----

GDBInit file: none

GDB Server Listening port: 2331

SWO raw output listening port: 2332

Terminal I/O port: 2333

Accept remote connection: localhost only

Generate logfile: off

Verify download: on

Init regs on start: on

Silent mode: off

Single run mode: on

Target connection timeout: 0 ms

------J-Link related settings------

J-Link Host interface: USB

J-Link script: none

J-Link settings file: none

------Target related settings------

Target device: MK64FN1M0xxx12

Target interface: SWD

Target interface speed: 1000kHz

Target endian: little

Connecting to J-Link...

J-Link is connected.

Firmware: J-Link V10 compiled Jun 10 2016 13:55:26

Hardware: V10.00

S/N: 600001100

Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB

Checking target voltage...

Target voltage: 3.33 V

Listening on TCP/IP port 2331

Connecting to target...Connected to target

Waiting for GDB connection...Connected to 127.0.0.1

Reading all registers

Read 4 bytes @ address 0x00000000 (Data = 0x20030000)

Target interface speed set to 30 kHz

Resetting target

Halting target CPU...

...Target halted (PC = 0x00001758)

R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000

R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000

R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000

R12= 00000000, R13= 20030000, MSP= 20030000, PSP= 00000000

R14(LR) = FFFFFFFF, R15(PC) = 00001758

XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000

CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00

Reading all registers

Select auto target interface speed (2000 kHz)

Flash breakpoints enabled

Re: Custom K24 board SWD failure

jacobjennings — Fri, 08 Jul 2016 20:10:58 GMT

Thanks BlackNight for the advice on SWD setup. I took your advice on a new board design, and after populating it today, I found out that the reset loop I see on the reset pin is a software issue. If I use the KSDK 2.0 project wizard to create an empty basic project, a reset loop occurs. If I use the KSDK 1.3 project wizard, all is well. I suspect my previous boards are functional as well. I haven't the slightest idea why this would be with an empty, fresh project, but I will do some digging this afternoon.

Re: Custom K24 board SWD failure

jacobjennings — Mon, 11 Jul 2016 18:11:03 GMT

The separate MK24..._flash.ld and MK24..._ram.ld definitions bundled with KSDK2.0 were invalid. Using the combined linker definition file from K64 (identical flash/ram areas) fixes the issue