<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Configure pll_init(CORE_CLK_MHZ, REF_CLK) in twr-k53N512 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Configure-pll-init-CORE-CLK-MHZ-REF-CLK-in-twr-k53N512/m-p/511630#M32355</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to configure a uart2 in TWR-K53N512 from its expansion port(TWR-ELEV primary pls check the PDF:DRM141(freescale Kinetic TWR-K53N512))&lt;BR /&gt;I am in a confusion that how to setup the pll_init(); //default core clk:50Mhz,Ref clock=Xtal_8 with respect to example program of hello world&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It would be much help full if someone could tell how to setup pll_Init&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can reach via skype :avarghese_i3&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 10 May 2016 10:04:24 GMT</pubDate>
    <dc:creator>communitycommun</dc:creator>
    <dc:date>2016-05-10T10:04:24Z</dc:date>
    <item>
      <title>Configure pll_init(CORE_CLK_MHZ, REF_CLK) in twr-k53N512</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Configure-pll-init-CORE-CLK-MHZ-REF-CLK-in-twr-k53N512/m-p/511630#M32355</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to configure a uart2 in TWR-K53N512 from its expansion port(TWR-ELEV primary pls check the PDF:DRM141(freescale Kinetic TWR-K53N512))&lt;BR /&gt;I am in a confusion that how to setup the pll_init(); //default core clk:50Mhz,Ref clock=Xtal_8 with respect to example program of hello world&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It would be much help full if someone could tell how to setup pll_Init&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can reach via skype :avarghese_i3&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 May 2016 10:04:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Configure-pll-init-CORE-CLK-MHZ-REF-CLK-in-twr-k53N512/m-p/511630#M32355</guid>
      <dc:creator>communitycommun</dc:creator>
      <dc:date>2016-05-10T10:04:24Z</dc:date>
    </item>
  </channel>
</rss>

