Kinetis Microcontrollers中的主题 Re: K66 interrupt controller register

K66 interrupt controller register

arielablumer — Tue, 03 May 2016 04:44:52 GMT

Hi,

This is kind of a veru basic question but I couldn't find in the K66 Sub-Family Reference Manual the interrupt controller register. Specifically I'd like to know which register is used for enabling/disabling all interrupts (the one affected by CPSIE/D I). Is this register visible in the debugger?

Thanks,

Ariela

Re: K66 interrupt controller register

egoodii — Tue, 03 May 2016 14:43:45 GMT

See the 'basic' answers in:

How does “CPSID” (used to control interrupts) work?

Will the KL17 allow higher priority interrupts to interrupt a lower priority interrupt?

Re: K66 interrupt controller register

kerryzhou — Wed, 04 May 2016 05:32:50 GMT

Hi Ariela,

K66 is the ARM cortex -M4 core, about the interrupt register, you can find it in the ARM cortex M4 core document, please go to this link:

ARM Information Center

CPSIE I Enable interrupts (clear PRIMASK). Same as __enable_irq();

CPSID I Disable interrupts (set PRIMASK). NMI and HardFault are not affected. Same as __disable_irq();

Wish it helps you!

If you still have question, please contact me!

Have a great day,
Jingjing

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