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    <title>topic Re: I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U??? in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486082#M29874</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You will find, as in another thread, that a 'single access' (i.e., unaligned 32-bit) that attempts to CROSS the boundary nets a hard-fault:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;NOTE&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Burst-access cannot occur across the 0x2000_0000 boundary&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;that separates the two SRAM arrays. The two arrays should be&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;treated as separate memory ranges for burst accesses.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If 'nothing else' the split of SRAM allows two masters independent, non-interference simultaneous access (one to each) thru the crossbar switch.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;The following simultaneous accesses can be made to different logical halves of the&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;SRAM:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core code and core system&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core code and non-core master&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core system and non-core master&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The 'best' way to force particular elements to particular address is by defining them as a section thru the linker.&amp;nbsp; You can 'force' an address in your compiler, but then you are 'on your own' to insure no overlap by the linked objects.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NO SRAM contents are 'directly' affected by reset, but NONE survives power-cycle.&amp;nbsp; Your device MAY have a 32-byte VBAT register file that, as battery-backed, retains thru power-cycle.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 20 May 2016 02:19:29 GMT</pubDate>
    <dc:creator>egoodii</dc:creator>
    <dc:date>2016-05-20T02:19:29Z</dc:date>
    <item>
      <title>I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U???</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486078#M29870</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Does the number of cycles used by RAM_L and RAM_Ufor data read and write operations are same???&lt;/P&gt;&lt;P&gt;Does this microcontroller has any persistent RAM space(data is not lost even after reset).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance!!!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 04:59:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486078#M29870</guid>
      <dc:creator>priyankavorugan</dc:creator>
      <dc:date>2016-04-28T04:59:00Z</dc:date>
    </item>
    <item>
      <title>Re: I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U???</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486079#M29871</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;1. Does the number of cycles used by RAM_L and RAM_Ufor data read and write operations are same?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Yes.&lt;/P&gt;&lt;P&gt;2. Does this microcontroller has any persistent RAM space(data is not lost even after reset).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; The RAM can keep the data after POR.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 09:42:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486079#M29871</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-04-28T09:42:53Z</dc:date>
    </item>
    <item>
      <title>Re: I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U???</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486080#M29872</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then what is the purpose of separating the RAM into two parts???&lt;/P&gt;&lt;P&gt;I have another question;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt; we can store the variables in either ram or rom address using #pragma in the following way.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;define region RAM2&lt;/SPAN&gt;&lt;SPAN class="pun" style="color: #666600;"&gt;=&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt; mem:[&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;from &lt;/SPAN&gt;&lt;SPAN class="lit" style="color: #006666;"&gt;&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;0x20000000 size&amp;nbsp; 0x2000FFFE&lt;/SPAN&gt;&lt;SPAN class="pun" style="color: #666600;"&gt;];&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;place in&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt; RAM2 {&lt;/SPAN&gt;&lt;SPAN class="pun" style="color: #666600;"&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #000088;"&gt;readwrite section MY_RAM_DATA};&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;#pargma default_variable_attributes &lt;/SPAN&gt;&lt;SPAN class="pun" style="color: #666600;"&gt;=&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt; &lt;/SPAN&gt;&lt;SPAN class="pun" style="color: #666600;"&gt;@&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt; "MY_RAM_DATA"&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;&lt;/SPAN&gt;&lt;SPAN class="kwd" style="color: #000088;"&gt;&lt;/SPAN&gt;&lt;SPAN class="pln" style="color: #000000;"&gt; __no_init int * volatile ram_pointer;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;SPAN class="pln" style="color: #000000;"&gt;But how can we store the variable at particular address say 0x20000005 of RAM2 ???&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 11:06:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486080#M29872</guid>
      <dc:creator>priyankavorugan</dc:creator>
      <dc:date>2016-04-28T11:06:52Z</dc:date>
    </item>
    <item>
      <title>Re: I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U???</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486081#M29873</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'd highly recommend you to assign the variables to a 32bit-align absolute address, just in case.&lt;/P&gt;&lt;P&gt;Hope it helps.&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 14:53:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486081#M29873</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-04-28T14:53:15Z</dc:date>
    </item>
    <item>
      <title>Re: I need to check the RAM in my project.So I have gone through the MKL17Z datasheet  and I came to know that SRAM is divided into SRAM_L and SRAM_u. what is the difference between  SRAM_L and SRAM_U???</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486082#M29874</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You will find, as in another thread, that a 'single access' (i.e., unaligned 32-bit) that attempts to CROSS the boundary nets a hard-fault:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;NOTE&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Burst-access cannot occur across the 0x2000_0000 boundary&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;that separates the two SRAM arrays. The two arrays should be&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;treated as separate memory ranges for burst accesses.&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If 'nothing else' the split of SRAM allows two masters independent, non-interference simultaneous access (one to each) thru the crossbar switch.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;The following simultaneous accesses can be made to different logical halves of the&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;SRAM:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core code and core system&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core code and non-core master&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;• Core system and non-core master&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The 'best' way to force particular elements to particular address is by defining them as a section thru the linker.&amp;nbsp; You can 'force' an address in your compiler, but then you are 'on your own' to insure no overlap by the linked objects.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NO SRAM contents are 'directly' affected by reset, but NONE survives power-cycle.&amp;nbsp; Your device MAY have a 32-byte VBAT register file that, as battery-backed, retains thru power-cycle.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 May 2016 02:19:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/I-need-to-check-the-RAM-in-my-project-So-I-have-gone-through-the/m-p/486082#M29874</guid>
      <dc:creator>egoodii</dc:creator>
      <dc:date>2016-05-20T02:19:29Z</dc:date>
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