<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Problem with interrupts in a KL17Z256 processor.  in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480970#M29414</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear all.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to configure different interrupts on a KL 17Z256 processor ( KSDK1.0.0 and Kinetis 2.0 IDE.) but run into problems when several interrupts arrive within a short time frame. My main loop then simply get stuck.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hence I have some questions.&lt;/P&gt;&lt;P&gt;1) Are nestled interrupts enabled as default, that is, will my ISR routine get interrupted for other interrupts of higher prio?&lt;/P&gt;&lt;P&gt;2) Do I need to run PORT_HAL_ClearPinIntFlag after entering the ISR, or is this handled by itself. I have seen many different ideas about this on the internet, and in ARMs documention they state that the flag is cleared after entering the ISR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Peter Abdelmassih Waller&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 05 Apr 2016 13:58:19 GMT</pubDate>
    <dc:creator>peterabdelmassi</dc:creator>
    <dc:date>2016-04-05T13:58:19Z</dc:date>
    <item>
      <title>Problem with interrupts in a KL17Z256 processor.</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480970#M29414</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear all.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to configure different interrupts on a KL 17Z256 processor ( KSDK1.0.0 and Kinetis 2.0 IDE.) but run into problems when several interrupts arrive within a short time frame. My main loop then simply get stuck.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hence I have some questions.&lt;/P&gt;&lt;P&gt;1) Are nestled interrupts enabled as default, that is, will my ISR routine get interrupted for other interrupts of higher prio?&lt;/P&gt;&lt;P&gt;2) Do I need to run PORT_HAL_ClearPinIntFlag after entering the ISR, or is this handled by itself. I have seen many different ideas about this on the internet, and in ARMs documention they state that the flag is cleared after entering the ISR.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Peter Abdelmassih Waller&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Apr 2016 13:58:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480970#M29414</guid>
      <dc:creator>peterabdelmassi</dc:creator>
      <dc:date>2016-04-05T13:58:19Z</dc:date>
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      <title>Re: Problem with interrupts in a KL17Z256 processor.</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480971#M29415</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;1) Are nestled interrupts enabled as default, that is, will my ISR routine get interrupted for other interrupts of higher prio?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Yes, the lower interrupt will be preempted by the higher interrupt.&lt;/P&gt;&lt;P&gt;2) Do I need to run PORT_HAL_ClearPinIntFlag after entering the ISR, or is this handled by itself. I have seen many different ideas about this on the internet, and in ARMs documention they state that the flag is cleared after entering the ISR.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You need to use the PORT_HAL_ClearPinIntFlag function to clear the status of the GPIO interrupt.&lt;/P&gt;&lt;P&gt;Hope it helps.&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Apr 2016 06:46:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480971#M29415</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-04-06T06:46:40Z</dc:date>
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    <item>
      <title>Re: Problem with interrupts in a KL17Z256 processor.</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480972#M29416</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jeremy, &lt;/P&gt;&lt;P&gt;thank you for your support, it will surely help in the troubleshooting. &lt;/P&gt;&lt;P&gt;Is it correct that an interrupt will not be preempted by another one with the same priority?&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Apr 2016 08:51:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480972#M29416</guid>
      <dc:creator>peterabdelmassi</dc:creator>
      <dc:date>2016-04-06T08:51:41Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with interrupts in a KL17Z256 processor.</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480973#M29417</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Another question...if only higher prio interrupts lower prio, then nested interrupts are not "turned on" in my case since I didnt change any priorities and they are problaby all equal (zero??).&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is correct then that only system interrupts (not possible to change prio on those) that will interrupt my onging ISRs?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Kind Regards&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Apr 2016 09:11:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480973#M29417</guid>
      <dc:creator>peterabdelmassi</dc:creator>
      <dc:date>2016-04-06T09:11:44Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with interrupts in a KL17Z256 processor.</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480974#M29418</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;1) Is it correct that an interrupt will not be preempted by another one with the same priority?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; No.&lt;/P&gt;&lt;P&gt;And I'd highly recommend you to learn the more information about the NVIC from the ARM website whose link is below.&lt;/P&gt;&lt;P&gt;&lt;A href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/CIHIGCIF.html" title="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0497a/CIHIGCIF.html"&gt;ARM Information Center&lt;/A&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Apr 2016 02:18:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Problem-with-interrupts-in-a-KL17Z256-processor/m-p/480974#M29418</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-04-07T02:18:20Z</dc:date>
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  </channel>
</rss>

