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    <title>topic Re: KL27Z: DMA doesn't increment in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL27Z-DMA-doesn-t-increment/m-p/477545#M29128</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;After I've had a brief look through the code, I found that you already set the DMA_DCR0[DINC]=1 which enable the DAR increments by 1,2,4 depending upon the size of the transfer.&lt;/P&gt;&lt;P&gt;So I also feel weird, and I'd highly recommend you to refer to the thread for details.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-102951"&gt;PIT- ADC- DMA Example for FRDM-KL25z, FRDM-K64F, TWR-K60D100 and TWR-K70&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 02 Feb 2016 08:19:03 GMT</pubDate>
    <dc:creator>jeremyzhou</dc:creator>
    <dc:date>2016-02-02T08:19:03Z</dc:date>
    <item>
      <title>KL27Z: DMA doesn't increment</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL27Z-DMA-doesn-t-increment/m-p/477544#M29127</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I encountered a strange behaviour of the DMA and wanted to ask if I'm missing some point to get it working correctly.&lt;/P&gt;&lt;P&gt;I'm working on the FRDM-KL27Z board.&lt;/P&gt;&lt;P&gt;The idea is to measure from 2 ADC Inputs and save the data inside a buffer.&lt;/P&gt;&lt;P&gt;I'm trying an approach like described in AN4590, just without the PDB trigger.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The raw funcionality should be to trigger the ADC in software mode and safe the result inside a buffer.&lt;/P&gt;&lt;P&gt;In Detail:&lt;/P&gt;&lt;P&gt;- ADC reads Input 1 and writes inside ADC0_RA&lt;/P&gt;&lt;P&gt;- COCO is set and DMA0 is set to start at&amp;nbsp; peripheral request from ADC&lt;/P&gt;&lt;P&gt;- DMA0 Transfers data to a buffer and increments&lt;/P&gt;&lt;P&gt;- DMA1 is linked to start after DMA0 finishes&lt;/P&gt;&lt;P&gt;- DMA1 reads a value from an array and writes it to ADC0_SC1A, then increments the sopurce array&lt;/P&gt;&lt;P&gt;- ADC now starts a new conversion on the channel described inside the Array&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And from here everything starts over.&lt;/P&gt;&lt;P&gt;After completing a whole cyclus an interrupt is called, which resets the destination address of DMA0 and the source address of DMA1.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Everything works, except one little detail:&lt;/P&gt;&lt;P&gt;DMA0 does not increment if DMA1 triggers a new ADC conversion.&lt;/P&gt;&lt;P&gt;The channel is changed and the result written inside the correct destination buffer, but always inside the first address of this buffer.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Has anyone ever encountered such a behaviour?&lt;/P&gt;&lt;P&gt;I'll post the DMA and ADC settings at the end of this post.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Hans&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ADC:&lt;/P&gt;&lt;P&gt;ADC0_CFG1_Mode = 11&lt;/P&gt;&lt;P&gt;ADC0_SC2_DMAEN = 1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DMA0:&lt;/P&gt;&lt;P&gt;DMA_DCR0_EINT = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_ERQ = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_CS = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_EADREQ = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_SSIZE = 10&lt;/P&gt;&lt;P&gt;DMA_DCR0_DSIZE = 10&lt;/P&gt;&lt;P&gt;DMA_DCR0_DINC = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_DREQ = 1&lt;/P&gt;&lt;P&gt;DMA_DCR0_LINKCC = 10&lt;/P&gt;&lt;P&gt;DMA_DCR0_LCH1 = 01&lt;/P&gt;&lt;P&gt;DMAMUX0_CHCFG0_SOURCE = 0d40 (ADC0)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DMA1:&lt;/P&gt;&lt;P&gt;DMA_DCR1_EINT = 1&lt;/P&gt;&lt;P&gt;DMA_DCR1_ERQ = 1&lt;/P&gt;&lt;P&gt;DMA_DCR1_CS = 1&lt;/P&gt;&lt;P&gt;DMA_DCR1_EADREQ = 1&lt;/P&gt;&lt;P&gt;DMA_DCR1_SSIZE = 01&lt;/P&gt;&lt;P&gt;DMA_DCR1_DSIZE = 01&lt;/P&gt;&lt;P&gt;DMA_DCR1_SINC = 1&lt;/P&gt;&lt;P&gt;DMA_DCR1_DREQ = 1&lt;/P&gt;&lt;P&gt;DMAMUX0_CHCFG1_SOURCE = 0d60 (always on)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Feb 2016 15:27:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL27Z-DMA-doesn-t-increment/m-p/477544#M29127</guid>
      <dc:creator>aihans</dc:creator>
      <dc:date>2016-02-01T15:27:13Z</dc:date>
    </item>
    <item>
      <title>Re: KL27Z: DMA doesn't increment</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL27Z-DMA-doesn-t-increment/m-p/477545#M29128</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;After I've had a brief look through the code, I found that you already set the DMA_DCR0[DINC]=1 which enable the DAR increments by 1,2,4 depending upon the size of the transfer.&lt;/P&gt;&lt;P&gt;So I also feel weird, and I'd highly recommend you to refer to the thread for details.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-102951"&gt;PIT- ADC- DMA Example for FRDM-KL25z, FRDM-K64F, TWR-K60D100 and TWR-K70&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 Feb 2016 08:19:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/KL27Z-DMA-doesn-t-increment/m-p/477545#M29128</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2016-02-02T08:19:03Z</dc:date>
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