topic Re: How to implement a DMA-based SPI driver interface in Kinetis Microcontrollers

How to implement a DMA-based SPI driver interface

elecsmith — Fri, 11 Mar 2016 17:05:21 GMT

I would like to implement a driver interface function that allows a user to pass in a buffer of SPI bytes to be sent and have that data sent over SPI using DMA. However, the combined command and data implementation of the SPI TX FIFO registers makes this difficult. It looks like I would have to separately allocate four times as much memory (32 bit words instead of 8-bit bytes passed in by the user) to use for DMA, then manually copy the user's data into the memory along with the command words. Is there a better way to do this that does not involve a separate allocation and copy? I do not see an application note or anything similar explaining this. Thank you.

Re: How to implement a DMA-based SPI driver interface

xiangjun_rong — Mon, 14 Mar 2016 03:44:43 GMT

Hi,

I copy the part from the reference manual of K65.

Obviously, when the SPI is set up in master mode and you use the DMA to transfer 8 bits or 16 bits data to the 32 bits SPIx_PUSHR, the High 16 bits of SPIx_PUSHR keep the last value instead of zero.

after you initialize the SPI and DMA module, write a 32 bits data to the SPIx_PUSHR by software, which include the command in the high 16 bits, when the transfer is over, it will trigger DMA to transfer data from buffer to the SPIx_PUSHR register, the DMA can write 8 bits or 16 bits data to SPIx_PUSHR register, the High 16 bits of SPIx_PUSHR will remain the last value.

Hope it can help you.

XiangJun Rong

57.1.11 Writing SPI Transmit FIFO

The SPI supports 8-bit or 16-bit writes to the PUSH TX FIFO, allowing a single write to

the command word followed by multiple writes to the transmit word. The TX FIFO will

save the last command word written, and convert a 8-bit/16-bit write to the transmit word

into a 32-bit write that pushes both the command word and transmit word into the TX

FIFO (PUSH TX FIFO Register In Master Mode)

A 32-bit write to the SPI_PUSH register will push all 32-bits to the TX FIFO. An 8-bit or

16-bit write to the 16-bit transmit data field will push the data together with the last

written command word. An 8-bit or 16-bit write to the command word does not push data

onto the FIFO, but that command word is pushed to the TX FIFO on all subsequent 8-bit

or 16-bit writes to the transmit data field. This allows a single 16-bit write to the

command word to be used for all subsequent 8-bit or 16-bit writes to the transmit data

word. Writing a different 16-bit command word will cause all subsequent 8-bit or 16-bit

writes to the transmit data word to be pushed to the TX FIFO with the new command

word.

Re: How to implement a DMA-based SPI driver interface

elecsmith — Mon, 14 Mar 2016 15:53:07 GMT

Thank you! My datasheet (K10) does not describe this as clearly, and I did not understand this feature.