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    <title>Kinetis MicrocontrollersのトピックRe: NXP Kinetis MK20X256VLH7 (Teensy 3.2 Microcontroller) - Keil RTE_Device.h Issues</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469843#M28385</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Presumably the Keil startup code is missing port register clock enabling so that accesses to the port registers results in a hard fault.&lt;/P&gt;&lt;P&gt;Probably the CW startup code does this for all ports per default and then you don't notice it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;In case of issues you can get Teensy 3.2 Keil support at &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://www.utasker.com/kinetis/TEENSY_3.1.html" rel="nofollow"&gt;http://www.utasker.com/kinetis/TEENSY_3.1.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 18 Feb 2016 17:13:44 GMT</pubDate>
    <dc:creator>mjbcswitzerland</dc:creator>
    <dc:date>2016-02-18T17:13:44Z</dc:date>
    <item>
      <title>NXP Kinetis MK20X256VLH7 (Teensy 3.2 Microcontroller) - Keil RTE_Device.h Issues</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469842#M28384</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;Hi, i'm working in Keil with the NXP Kinetis MK20X256VLH7 (Teensy 3.2 microcontroller).&lt;/P&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;The microprocessor seems to get stuck when i wrote to these registers:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;PORTB-&amp;gt;PCR[16] = (uint32_t)(PORT_PCR_MUX(0x03));&lt;/P&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;PORTB-&amp;gt;PCR[17] = (uint32_t)(PORT_PCR_MUX(0x03));&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;The problem seems to be that the pin configuration has to be done on the RTE_Device.h file, however i don't know how to reference them in my project.&lt;/P&gt;&lt;P style="font-size: 14px; font-family: 'Gill Sans Alt One WGL W01 Lt'; color: #565b5b;"&gt;By the way, I'm configuring the peripherals from the scratch and YES!!!, I try with Codewarrior and don't have any problem.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Feb 2016 16:22:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469842#M28384</guid>
      <dc:creator>julioe_fajardo</dc:creator>
      <dc:date>2016-02-18T16:22:18Z</dc:date>
    </item>
    <item>
      <title>Re: NXP Kinetis MK20X256VLH7 (Teensy 3.2 Microcontroller) - Keil RTE_Device.h Issues</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469843#M28385</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Presumably the Keil startup code is missing port register clock enabling so that accesses to the port registers results in a hard fault.&lt;/P&gt;&lt;P&gt;Probably the CW startup code does this for all ports per default and then you don't notice it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;In case of issues you can get Teensy 3.2 Keil support at &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="http://www.utasker.com/kinetis/TEENSY_3.1.html" rel="nofollow"&gt;http://www.utasker.com/kinetis/TEENSY_3.1.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Feb 2016 17:13:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469843#M28385</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2016-02-18T17:13:44Z</dc:date>
    </item>
    <item>
      <title>Re: NXP Kinetis MK20X256VLH7 (Teensy 3.2 Microcontroller) - Keil RTE_Device.h Issues</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469844#M28386</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for replying, your answer was helpful.&lt;/P&gt;&lt;P&gt;It requires enable both UART0 and PORTB clocks, i was enabling only UART0 clock.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 18 Feb 2016 21:17:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/NXP-Kinetis-MK20X256VLH7-Teensy-3-2-Microcontroller-Keil-RTE/m-p/469844#M28386</guid>
      <dc:creator>julioe_fajardo</dc:creator>
      <dc:date>2016-02-18T21:17:24Z</dc:date>
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