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    <title>topic Re: DMA Scatter/Gather loads wrong adress in TCD in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-Scatter-Gather-loads-wrong-adress-in-TCD/m-p/442949#M26047</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Please refer to this experiment doc to implement the scatter/gather function.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-100304"&gt;使用DMA降低SPI通信过程中内核负荷 Reduce core work load with DMA Module during SPI communication&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 02 Jul 2015 07:27:40 GMT</pubDate>
    <dc:creator>jeremyzhou</dc:creator>
    <dc:date>2015-07-02T07:27:40Z</dc:date>
    <item>
      <title>DMA Scatter/Gather loads wrong adress in TCD</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-Scatter-Gather-loads-wrong-adress-in-TCD/m-p/442948#M26046</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi together,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a problem implementing the scatter/gather mechnism for the eDMA. My Processor is a MK61FN1M0VMJ15.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When finished the major loop, the field DLAST_SGA is added to the current DADDR.&lt;/P&gt;&lt;P&gt;But because of the fact, that the E_SG Bit (Enable Scatter/Gather) is set, this address &lt;STRONG&gt;should NOT be added&lt;/STRONG&gt;, but the new TCD should be copied from this adress.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I found an errata for such a case, but I am not sure, if it is for this processor. (4N86B, e4626)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Following the code:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="_jivemacro_uid_14356544519389059 jive_macro_code jive_text_macro" data-renderedposition="218_8_1232_912" jivemacro_uid="_14356544519389059" modifiedtitle="true"&gt;&lt;P&gt;volatile uint32_t TCD_SG[] = {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (uint32_t)&amp;amp;testArray, 0x02020004,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000004, 0xFFFFFFEC,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x80000020, 0x00050004,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xFFFFFFEC, 0x00050001,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;static int32_t testArray[10] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10};&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void InitDMA(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;#ifdef __arm__&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; // DMA Request for rising edge; Port as GPIO;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PORTB-&amp;gt;PCR[2] &amp;amp;= ~PORT_PCR_IRQC_MASK &amp;amp;~PORT_PCR_MUX_MASK;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; PORTB-&amp;gt;PCR[2] = PORT_PCR_IRQC(1) | PORT_PCR_MUX(1);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; // Enable clock for DMAMUX and DMA&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; SIM-&amp;gt;SCGC6 |= SIM_SCGC6_DMAMUX0_MASK;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; SIM-&amp;gt;SCGC7 |= SIM_SCGC7_DMA_MASK;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Enable Channel 0 and set PORTF (FPGA_INT#2) as DMA request source &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMAMUX0-&amp;gt;CHCFG[0] |= DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(50);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Enable request signal for channel 0 &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;ERQ |= DMA_ERQ_ERQ0_MASK;// | DMA_ERQ_ERQ1_MASK;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Set memory address for source and destination &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].SADDR = (uint32_t)&amp;amp;testArray;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].DADDR = DDR_ADRESS_START;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Set an offset for source and destination address&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].SOFF = 0x04; // Source address offset per transaction&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].DOFF = 0x04; // Destination address offset per transaction&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Set source and destination data transfer size 32bit&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].ATTR = DMA_ATTR_SSIZE(2) | DMA_ATTR_DSIZE(2);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Number of bytes to be transfered in each service request of the channel&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].NBYTES_MLNO = 0x04; // 4 Bytes pro Minor Loop&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Current major iteration count (a single iteration of 5 bytes)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(5);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(5);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Adjustment value used to restore the source and destiny address to the initial value&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].SLAST = -0x14;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Source address adjustment&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].DLAST_SGA = (uint32_t)&amp;amp;TCD_SG[0];&amp;nbsp;&amp;nbsp;&amp;nbsp; // Destination address adjustment&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Setup control and status register&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].CSR = 0;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA0-&amp;gt;TCD[0].CSR |= DMA_CSR_ESG_MASK;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#else&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;K_MASK | DMA_CSR_MAJORLINKCH(1);&lt;/P&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jun 2015 08:58:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-Scatter-Gather-loads-wrong-adress-in-TCD/m-p/442948#M26046</guid>
      <dc:creator>AnEngineer</dc:creator>
      <dc:date>2015-06-30T08:58:34Z</dc:date>
    </item>
    <item>
      <title>Re: DMA Scatter/Gather loads wrong adress in TCD</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-Scatter-Gather-loads-wrong-adress-in-TCD/m-p/442949#M26047</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;Please refer to this experiment doc to implement the scatter/gather function.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-100304"&gt;使用DMA降低SPI通信过程中内核负荷 Reduce core work load with DMA Module during SPI communication&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ping&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Jul 2015 07:27:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-Scatter-Gather-loads-wrong-adress-in-TCD/m-p/442949#M26047</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2015-07-02T07:27:40Z</dc:date>
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