<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Documentation for X-TWR-K65F180M in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428951#M24779</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think my question is answered with the APP NOTE AN5095&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 19 Nov 2015 19:00:50 GMT</pubDate>
    <dc:creator>goranigic</dc:creator>
    <dc:date>2015-11-19T19:00:50Z</dc:date>
    <item>
      <title>Documentation for X-TWR-K65F180M</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428950#M24778</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is the documentation for X-TWR-K65F180M correct. SDRAM_A16 is skipped?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Nov 2015 17:49:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428950#M24778</guid>
      <dc:creator>goranigic</dc:creator>
      <dc:date>2015-11-19T17:49:00Z</dc:date>
    </item>
    <item>
      <title>Re: Documentation for X-TWR-K65F180M</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428951#M24779</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I think my question is answered with the APP NOTE AN5095&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 19 Nov 2015 19:00:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428951#M24779</guid>
      <dc:creator>goranigic</dc:creator>
      <dc:date>2015-11-19T19:00:50Z</dc:date>
    </item>
    <item>
      <title>Re: Documentation for X-TWR-K65F180M</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428952#M24780</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;TWR-K65F180M board is using MT48LC2M32B2P-5 SDRAM, which block diagram could be found below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Block diagram.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/31893i442D30CF53AE0DF5/image-size/large?v=v2&amp;amp;px=999" role="button" title="Block diagram.png" alt="Block diagram.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Customer could find TWR-K65F180M board schematics from &lt;A href="http://cache.freescale.com/files/microcontrollers/hardware_tools/schematics/TWR-K65F180M-SCH.pdf"&gt;here&lt;/A&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Nov 2015 06:32:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Documentation-for-X-TWR-K65F180M/m-p/428952#M24780</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2015-11-23T06:32:01Z</dc:date>
    </item>
  </channel>
</rss>

