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    <title>topic Re: K70 and PEG lite: Install ressource take a long time in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410339#M23125</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nobody to help me?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will try by an other maner.&lt;/P&gt;&lt;P&gt;I'm ask me a question: Is possible to increase NandFlash clock?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently, I'm using a board similar to the Tower K70 except&amp;nbsp; for the&amp;nbsp; nandFlash, the&amp;nbsp; NandFlash&amp;nbsp; is not the 16Bit model but the 8Bit:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;MT29F2G08 instead of MT29F2G16.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;The Kinetis also is not a 120Mhz but a 150Mhz. Due to this, I modified MQX to increase clock from 120 to 150MHz:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;MCG_C5 ) 0x03 instead of 0x04&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;And the constant modified like bellow. Then my question is Can I increase NandFlash clock?&amp;nbsp; If yes which clock Hav&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14436203846055176 jive_text_macro" data-renderedposition="339_8_1232_0" jivemacro_uid="_14436203846055176"&gt;&lt;P&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14436204295013635 jive_text_macro" data-renderedposition="339_8_1232_288" jivemacro_uid="_14436204295013635"&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt; CPU_BUS_CLK_HZ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Initial value of the bus clock frequency in Hz */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Initial value of the core/system clock frequency in Hz.&amp;nbsp; */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;

&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; &lt;/SPAN&gt; CPU_BUS_CLK_HZ_CLOCK_CONFIG0&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Value of the bus clock frequency in the clock configuration 0 in Hz. */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ_CLOCK_CONFIG0&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Value of the core/system clock frequency in the clock configuration 0 in Hz. */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;

&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CLOCK_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0x00&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Clock configuration 0 identifier */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Core clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_BUS_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Bus clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_FLEXBUS_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;50000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Flexbus clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_FLASH_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;25000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* FLASH clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_USB_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* USB clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_PLL_FLL_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* PLL/FLL clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_MCGIR_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* MCG internal reference clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_OSCER_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;50000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* System OSC external reference clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_ERCLK32K_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;32768U&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;L &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* External reference clock 32k frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_MCGFF_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;24414&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* MCG fixed frequency clock */&lt;/EM&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 30 Sep 2015 13:41:44 GMT</pubDate>
    <dc:creator>arnogir</dc:creator>
    <dc:date>2015-09-30T13:41:44Z</dc:date>
    <item>
      <title>K70 and PEG lite: Install ressource take a long time</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410338#M23124</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello every body&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm using a K70 with MQX 4.1 with PEG lite. (Tower K70) and a screen of 800x600.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a PEG ressource file of about 10Mo size (it is a small application, I have not many Picture I think).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the ressource file in binary (.pbr) is stored in the external flash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;On PEG start, I call the function to Install ressource , then I supposed in it, the ressource file is unzipped in the external RAM.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My problem is this procedure take a long time (about 10s).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you know if there are a way to reduce this time? because in other word, after power on, I have a delay of 10s before see any picture displayed on the screen.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Note: For the moment, I modified PEG driver to display a welcome picture during this phase, but like this picture is not managed by PEG, it is stored in CONST in my program and then take big place (800x600 x2 Bytes = 960KBytes (1MB available...) ! then my welcome picture is in reduce size to take less place (400*200*2)&lt;/P&gt;&lt;P&gt;But I prefered the install ressource take less place.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;:smileyhappy:&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 27 Sep 2015 09:57:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410338#M23124</guid>
      <dc:creator>arnogir</dc:creator>
      <dc:date>2015-09-27T09:57:47Z</dc:date>
    </item>
    <item>
      <title>Re: K70 and PEG lite: Install ressource take a long time</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410339#M23125</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Nobody to help me?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will try by an other maner.&lt;/P&gt;&lt;P&gt;I'm ask me a question: Is possible to increase NandFlash clock?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently, I'm using a board similar to the Tower K70 except&amp;nbsp; for the&amp;nbsp; nandFlash, the&amp;nbsp; NandFlash&amp;nbsp; is not the 16Bit model but the 8Bit:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;MT29F2G08 instead of MT29F2G16.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;The Kinetis also is not a 120Mhz but a 150Mhz. Due to this, I modified MQX to increase clock from 120 to 150MHz:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;MCG_C5 ) 0x03 instead of 0x04&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;And the constant modified like bellow. Then my question is Can I increase NandFlash clock?&amp;nbsp; If yes which clock Hav&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14436203846055176 jive_text_macro" data-renderedposition="339_8_1232_0" jivemacro_uid="_14436203846055176"&gt;&lt;P&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code _jivemacro_uid_14436204295013635 jive_text_macro" data-renderedposition="339_8_1232_288" jivemacro_uid="_14436204295013635"&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt; CPU_BUS_CLK_HZ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Initial value of the bus clock frequency in Hz */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Initial value of the core/system clock frequency in Hz.&amp;nbsp; */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;

&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; &lt;/SPAN&gt; CPU_BUS_CLK_HZ_CLOCK_CONFIG0&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Value of the bus clock frequency in the clock configuration 0 in Hz. */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ_CLOCK_CONFIG0&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Value of the core/system clock frequency in the clock configuration 0 in Hz. */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;

&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CLOCK_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0x00&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;U &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Clock configuration 0 identifier */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_CORE_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Core clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_BUS_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;75000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Bus clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_FLEXBUS_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;50000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* Flexbus clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_FLASH_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;25000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* FLASH clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_USB_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* USB clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_PLL_FLL_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;150000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* PLL/FLL clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_MCGIR_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;0&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* MCG internal reference clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_OSCER_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;50000000&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* System OSC external reference clock frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_ERCLK32K_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;32768U&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;L &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* External reference clock 32k frequency in clock configuration 0 */&lt;/EM&gt;&lt;SPAN style="font-size: 10pt;"&gt;
&lt;/SPAN&gt;&lt;SPAN style="color: #ff0000; font-size: 10pt;"&gt;#define&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt; CPU_MCGFF_CLK_HZ_CONFIG_0&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN style="color: #808000; font-size: 10pt;"&gt;24414&lt;/SPAN&gt;&lt;SPAN style="font-size: 10pt;"&gt;UL &lt;/SPAN&gt;&lt;EM style=": ; color: #008000; font-size: 10pt;"&gt;/* MCG fixed frequency clock */&lt;/EM&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Sep 2015 13:41:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410339#M23125</guid>
      <dc:creator>arnogir</dc:creator>
      <dc:date>2015-09-30T13:41:44Z</dc:date>
    </item>
    <item>
      <title>Re: K70 and PEG lite: Install ressource take a long time</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410340#M23126</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So to close this post, I come back here:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The response is NO. The nandflash read/unzip to RAM take this time. No reduce is possible, just the ressource file is a big file.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So I modify the PEG driver to display a small bitmap on the screen (loading screen) to make wait user...&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Jan 2016 06:37:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/K70-and-PEG-lite-Install-ressource-take-a-long-time/m-p/410340#M23126</guid>
      <dc:creator>arnogir</dc:creator>
      <dc:date>2016-01-05T06:37:09Z</dc:date>
    </item>
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