topic Re: SPI Mode --PCS keep low for any number of bytes in Kinetis Microcontrollers

SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 01:27:08 GMT

I have a peripheral which requires SPI CS "16 bit mode" and "turbo mode". In turbo mode, the CS keep low for any number of bytes sending.

In PE, there are 16 bit mode, the SPI CS keep low during sending the 16 bit bytes, that is achievable.

But in PE SPI "Attribute set" ==> width , there is no such "turbo mode". Does anyone knows how to achieve it?

Sam

Re: SPI Mode --PCS keep low for any number of bytes

Alice_Yang — Tue, 16 Jun 2015 02:22:13 GMT

Hello rabbitz,

Please tell me which chip and which IDE ?

Alice

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 06:12:30 GMT

Chip:

MK20DX128VLH5

IDE: CodeWarrior 10.6 with PE

Re: SPI Mode --PCS keep low for any number of bytes

Alice_Yang — Tue, 16 Jun 2015 06:23:55 GMT

Hello,

What's meaning about "turbo mode" ? In the reference manual about this chip, i also haven't find it, thank !

Alice

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 06:28:25 GMT

turbo mode ==> PCS keep low during sending any bytes of data.

Re: SPI Mode --PCS keep low for any number of bytes

xiangjun_rong — Tue, 16 Jun 2015 06:57:58 GMT

Hi, Rabbitz,

thank you for your feedback.

I see that you use MK20DX128 and CW ver10.6 plus PE. If I understand you correctly, the so-called "turbo mode" is that the /SS of slave SPI is always low, in the case, I suggest you connect a GPIO pin of the master SPI to the /SS pin of the slave SPI, before you transfer data, clear the GPIO, it is okay.

If you do connect the PCSx of master SPI to the /SS pin of the slave spi, your idea is okay to be implemented, from SPI module, if you set the CONT bit(MSB) of SPIx_PUSHR, the PCS pin will always be kept low even between the interval of two SPI transfer.

The PE support the feature, pls select "no" for the 'chip select toggling" as the following figure cut from PE bean.

But I do not think keep PCS low is a good idea because SPI frame lose synchronization for each data.

Hope it can help you.

XiangJun Rong

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 07:14:18 GMT

Just to make it clear.

I my case, the peripheral has two kinds of SPI communication: sending CMD (one 16 bytes CMD), sending Data(maybe many 16 bytes of data).

The PCS is high after SPI communication, PCS is low during SPI communication,

I use PCS rather than a GPIO to control SPI-CS.

if send CMD, the PCS will be low for 16 SPI-CLK period. That is OK, I know how to do it.

if sending data, the PCS will be low for 16* (Number of bytes sending) SPI-CLK period ===>this is so called "turbo mode". I don't know how to make PCS low for long period during SPI sending data.

Regards

Sam

Re: SPI Mode --PCS keep low for any number of bytes

xiangjun_rong — Tue, 16 Jun 2015 07:33:53 GMT

Hi, Rabbitz,

Maybe you do not understand you mechanism of SPI master transfer, Pls check the 43.3.7 DSPI PUSH TX FIFO Register In Master Mode (SPIx_PUSHR) in reference manual of K20, the SPIx_PUSHR is a 32 bits register, low 16 bits are data bits, high 16 bits are command bits, when you write the 32 bits data(command|data) to the SPIx_PUSHR, the 16 bits data will be written to the SPI shift register and outputted via serial stream via SPI_SOUT pin, while the corresponding PCSx will be driven which is defined in command bits in the SPIx_PUSHR. If the CONT (MSB) bit in SPIx_PUSHR is set, the PCSx will keep low, for example, if you write SPIx_PUSHR register 20 times with the CONT cleared, the PCSx will be low for the 20 words transfer(20*16 bits). Once you clear the CONT bit in the SPIx_PUSHR, the PCS will be high between two SPI transfer interval.

Hope it can help you

XiangJun Rong

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 08:00:12 GMT

Hi Rong,

I write this code to do SPI data,

spiMasterDevData = SM1_Init(NULL);

...

SM1_SendBlock(spiMasterDevData, &CMDData[0], 4); ==>SPI sending 4 data, the PCS goes high 3 times.

What I am concern is which PE generated function can keep PCS low during SPI many bytes of data, or I should write one function by myself?

Regards

Sam

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Tue, 16 Jun 2015 08:43:55 GMT

Hi Rong,

I write this code to send CMD to peripheral and read feedback from it.

SM1_SendBlock(spiMasterDevData, &CMDData[0], 1); //PCS goes LOW, Good.

.........

..........

SPI_PDD_WriteData16Bits(SPI0_BASE_PTR, 0x00); //SPI-CLK to push data out from peripheral. ==>Get SPI-CLK, but PCS not go LOW???

SPI_PDD_EnableDmasInterrupts(SPI0_BASE_PTR, SPI_PDD_RX_FIFO_DRAIN_INT_DMA); /* Enable RX interrupt */

SM1_ReceiveBlock(spiMasterDevData, &RxData[0], 1);

I can't understand why "SPI_PDD_WriteData16Bits(SPI0_BASE_PTR, 0x00) " ==>PCS not low

Regards

Sam

Re: SPI Mode --PCS keep low for any number of bytes

xiangjun_rong — Tue, 16 Jun 2015 09:10:09 GMT

Hi, Rabbitz,

The following is the macro, obviously, it only writes the Low 16 bits of the SPI_PUSHR, it does not write the High 16 bits of SPI0_PUSHR, that is why the PCS is high during the interval of SPI transfer.

#define SPI_PDD_WriteData16Bits(PeripheralBase, Data) ( \

*((uint16_t *)&SPI_PUSHR_REG(PeripheralBase)) = (uint16_t)Data \

)

XiangJun Rong

Re: SPI Mode --PCS keep low for any number of bytes

xiangjun_rong — Tue, 16 Jun 2015 09:14:30 GMT

Hi,Sam,

SPI_PDD_WriteMasterPushTxFIFOReg(SPI0_BASE_PTR, (uint32_t)(*((uint16_t *)DeviceDataPrv->OutDataPtr) | DeviceDataPrv->TxCommand)); /* Put a character with command to the transmit register */

The above code is the code to write the pSPI_PUSHR register based on PE in ISR:

PE_ISR(SMasterLdd1_Interrupt)

{

/* {Default RTOS Adapter} ISR parameter is passed through the global variable */

SMasterLdd1_TDeviceDataPtr DeviceDataPrv = INT_SPI0__DEFAULT_RTOS_ISRPARAM;

uint32_t StatReg = SPI_PDD_GetInterruptFlags(SPI0_BASE_PTR); /* Read status register */

uint16_t Data; /* Temporary variable for data */

if ((StatReg & SPI_PDD_RX_FIFO_OVERFLOW_INT) != 0U) { /* Is any error flag set? */

SPI_PDD_ClearInterruptFlags(SPI0_BASE_PTR,SPI_PDD_RX_FIFO_OVERFLOW_INT); /* Clear error flags */

}

if ((StatReg & SPI_PDD_RX_FIFO_DRAIN_INT_DMA) != 0U) { /* Is any char in HW buffer? */

Data = (uint16_t)SPI_PDD_ReadPopRxFIFOReg(SPI0_BASE_PTR); /* Read character from receiver */

SPI_PDD_ClearInterruptFlags(SPI0_BASE_PTR,SPI_PDD_RX_FIFO_DRAIN_INT_DMA); /* Clear Rx FIFO drain flags */

if (DeviceDataPrv->InpDataNumReq != 0x00U) { /* Is the receive block operation pending? */

*((uint16_t *)DeviceDataPrv->InpDataPtr) = Data; /* Put a character to the receive buffer */

DeviceDataPrv->InpDataPtr += sizeof(uint16_t); /* Increment pointer to the receive buffer */

DeviceDataPrv->InpRecvDataNum++; /* Increment received char. counter */

if (DeviceDataPrv->InpRecvDataNum == DeviceDataPrv->InpDataNumReq) { /* Is the requested number of characters received? */

DeviceDataPrv->InpDataNumReq = 0x00U; /* If yes then clear number of requested characters to be received. */

SMasterLdd1_OnBlockReceived(DeviceDataPrv->UserData);

}

if ((StatReg & SPI_PDD_TX_FIFO_FILL_INT_DMA) != 0U) { /* Is HW buffer empty? */

if (DeviceDataPrv->OutSentDataNum < DeviceDataPrv->OutDataNumReq) { /* Is number of sent characters less than the number of requested incoming characters? */

DeviceDataPrv->OutSentDataNum++; /* Increment the counter of sent characters. */

SPI_PDD_WriteMasterPushTxFIFOReg(SPI0_BASE_PTR, (uint32_t)(*((uint16_t *)DeviceDataPrv->OutDataPtr) | DeviceDataPrv->TxCommand)); /* Put a character with command to the transmit register */

DeviceDataPrv->OutDataPtr += sizeof(uint16_t); /* Increment pointer to the transmitt buffer */

if (DeviceDataPrv->OutSentDataNum == DeviceDataPrv->OutDataNumReq) {

DeviceDataPrv->OutDataNumReq = 0x00U; /* Clear the counter of characters to be send by SendBlock() */

SMasterLdd1_OnBlockSent(DeviceDataPrv->UserData);

}

} else {

SPI_PDD_DisableDmasInterrupts(SPI0_BASE_PTR, SPI_PDD_TX_FIFO_FILL_INT_DMA); /* Disable TX interrupt */

}

SPI_PDD_ClearInterruptFlags(SPI0_BASE_PTR,SPI_PDD_TX_FIFO_FILL_INT_DMA); /* Clear Tx FIFO fill flags */

}

Re: SPI Mode --PCS keep low for any number of bytes

rabbitz — Wed, 17 Jun 2015 07:10:40 GMT

Hi Rong,

Thanks. It works now, I made a mistake for set the"Chip Select Toggling" to "YES".

Regards

Sam