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    <title>topic Re: DMA multi-channles interrupt issue in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384715#M20652</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hui:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have post on&lt;/P&gt;&lt;P&gt;&lt;A href="http://pan.baidu.com/s/1eQrIWUY" target="test_blank"&gt;http://pan.baidu.com/s/1eQrIWUY&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You could find project in below folder, and tested on TWR-K70, PLS use K70 project, for I have exclude some files in this project.&lt;/P&gt;&lt;P&gt;KINETIS_120MHZ_SC1\KINETIS_120MHZ_SC\build\iar\adc_demo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Dawei You（尤大为）&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 01 Sep 2014 09:12:35 GMT</pubDate>
    <dc:creator>daweiyou</dc:creator>
    <dc:date>2014-09-01T09:12:35Z</dc:date>
    <item>
      <title>DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384709#M20646</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have question for DMA milti-channel interrupt.&lt;/P&gt;&lt;P&gt;I have ch0 and ch1 for PDB-DMA-ADC-DMA-SRAM circle sampling project, which is OK alone.&lt;/P&gt;&lt;P&gt;another application is to use DMA ch14 and ch15 to complete UART tx and rx, rx is one byte DMA receive interrupt(for test).&lt;/P&gt;&lt;P&gt;these two projects are OK alone, but when they work together, they will conflict when testing.&lt;/P&gt;&lt;P&gt;I design one test case, PDB almost&amp;nbsp; 60us once to trigger almost 8 channels ADC conv, after all channels completed, DMA0_ISR will be called to set DMA1_ERQ, which will allow PDB could trigger ch1 again next time. the code&amp;nbsp; like below.&lt;/P&gt;&lt;P&gt;void dma0_isr(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA_ERQ |= DMA_ERQ_ERQ1_MASK; //置ERQ1的使能，通道1的使能&lt;/P&gt;&lt;P&gt;&amp;nbsp; flag++;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA_CINT = 0x00; //clear int&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA_CDNE = 0x00; //clear done&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;UART isr continuely to tx and rx with PC, make sure the UART is busy.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then after some time works successfully, the ch1 ERQ never be set again, but DMA0 INT also not set.&lt;/P&gt;&lt;P&gt;which means, the ADC circule is destroyed, and never recover.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I try to change channle priority or ECP and DAP for suspent channel, but not works, like that&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI0 = 0x4E;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI1 = 0x4F;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI14 = 0xC1;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI15 = 0xC0;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I want to know, why the INT flag for DMA_CH0 dispears but the DMA_ERQ_ERQ1_MASK not set?&lt;/P&gt;&lt;P&gt;which should be completed in same ISR --- void dma0_isr(void), but from the debug view, the INT flag is cleared, but ERQ not set? seems which is not releatd with channels priority and arbitration.&lt;/P&gt;&lt;P&gt;Thx for your support.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Aug 2014 13:25:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384709#M20646</guid>
      <dc:creator>daweiyou</dc:creator>
      <dc:date>2014-08-27T13:25:08Z</dc:date>
    </item>
    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384710#M20647</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dawei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have you tried to modify the DMA CH0 and CH1 priority setting with below code:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI0 = 0x0E;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DMA_DCHPRI1 = 0x0F;&amp;nbsp; &lt;/P&gt;&lt;P&gt;And from you description, I learned the ADC circle as:&lt;/P&gt;&lt;P&gt;PDB-DMA(CH1)-ADC-DAM(CH0)-SRAM&lt;/P&gt;&lt;P&gt;For the PDB trigger 60us once, which seems trigger very frequency. &lt;/P&gt;&lt;P&gt;Can you extend the PDB trigger interval and if there will minimize the issue happen frequency?&lt;/P&gt;&lt;P&gt;And at DAM CH1 TCD setting, customer can clear DMA_TCD1_CSR [DREQ] bit and let CH1 ERQ bit always be enabled.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Wish it helps.&lt;BR /&gt;best regards &lt;BR /&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Aug 2014 07:08:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384710#M20647</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2014-08-28T07:08:50Z</dc:date>
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    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384711#M20648</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Ma Hui:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thx for your reply.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;(1)I ever adjust PDB to 120us, issue still occur, which seems not related wtih ADC dma channels itself.&lt;/P&gt;&lt;P&gt;(2)the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12px; background-color: #f6f6f6;"&gt;priority &lt;/SPAN&gt; setting is changed for different combination, not helpful&lt;/P&gt;&lt;P&gt;(3)clear DERQ, I know which will work, but there are one potenial risk. customer usr DMA isr to copy ADC data and do some other work.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; since in this testcase, the ERQ bit can't be set correctly, I am afraid this&amp;nbsp; DMA ISR is called. so user's operation will miss.&lt;/P&gt;&lt;P&gt;(4)BTW, I do some test again yesterday, I do not clear DONE bit in DMA ISR, I could find DONE is set after issue occur, but INT flag is cleared, and ERQ is cleared.&lt;/P&gt;&lt;P&gt;Which seems could prove that DMA ISR has clear INT flag, but ERQ bit is not&amp;nbsp; set succussfully, so next DMA service request is not started, and DONE bit stay set.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the question will main focus on why ERQ bit is not set, even if I double confirm in DMA ISR. I can;t see some in Errata.&lt;/P&gt;&lt;P&gt;Could you confirm this or tell me where this issue maybe occur?&lt;/P&gt;&lt;P&gt;Many thanks for you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Aug 2014 00:14:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384711#M20648</guid>
      <dc:creator>daweiyou</dc:creator>
      <dc:date>2014-08-29T00:14:50Z</dc:date>
    </item>
    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384712#M20649</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dawei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I checked Kinetis errata record, there is no related issue reported.&lt;/P&gt;&lt;P&gt;Could you check if there with code to using DMA_CERQ register clear ERQ bit in your project?&lt;/P&gt;&lt;P&gt;And which Kinetis product you are using?&lt;/P&gt;&lt;P&gt;If you could try below code to set DMA CH1 ERQ bit:&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA_CERQ = 0x1;&lt;/P&gt;&lt;P&gt;&amp;nbsp; DMA_SERQ = 0x1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps.&lt;BR /&gt;best regards &lt;BR /&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Aug 2014 07:30:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384712#M20649</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2014-08-29T07:30:27Z</dc:date>
    </item>
    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384713#M20650</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ma Hui:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Actually, one of my customer use K20DX128 72M product find this issue.&lt;/P&gt;&lt;P&gt;I have no this kind of tower board, so I tried to realized these function on K70 tower board.&lt;/P&gt;&lt;P&gt;Same test case, but not same coding, customer use DMA_SERQ = 0x1;&lt;/P&gt;&lt;P&gt;And I use DMA_ERQ |= DMA_ERQ_ERQ1_MASK, even I double check this bit is set before exit from ISR.&lt;/P&gt;&lt;P&gt;Which both could reproduce this problem.&lt;/P&gt;&lt;P&gt;If you are interesting in trying, I could send whole project to you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Dawei You（尤大为）&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Aug 2014 15:11:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384713#M20650</guid>
      <dc:creator>daweiyou</dc:creator>
      <dc:date>2014-08-29T15:11:20Z</dc:date>
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    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384714#M20651</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Dawei,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Yes, please send me the whole project.&lt;/P&gt;&lt;P&gt;I would do the test on my site.&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Wish it helps.&lt;BR /&gt;best regards &lt;BR /&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Sep 2014 01:46:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384714#M20651</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2014-09-01T01:46:19Z</dc:date>
    </item>
    <item>
      <title>Re: DMA multi-channles interrupt issue</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384715#M20652</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Hui:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have post on&lt;/P&gt;&lt;P&gt;&lt;A href="http://pan.baidu.com/s/1eQrIWUY" target="test_blank"&gt;http://pan.baidu.com/s/1eQrIWUY&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You could find project in below folder, and tested on TWR-K70, PLS use K70 project, for I have exclude some files in this project.&lt;/P&gt;&lt;P&gt;KINETIS_120MHZ_SC1\KINETIS_120MHZ_SC\build\iar\adc_demo&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Dawei You（尤大为）&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 01 Sep 2014 09:12:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/DMA-multi-channles-interrupt-issue/m-p/384715#M20652</guid>
      <dc:creator>daweiyou</dc:creator>
      <dc:date>2014-09-01T09:12:35Z</dc:date>
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