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    <title>topic GPIO restrictions on XTAL / EXTAL in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149758#M170</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;K60 user's manual &lt;U&gt;10.2.3 Signal Multiplexing Constraints&lt;/U&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;"The following signals have general purpose output capability only (no general purpose input):&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;- PTA18/EXTAL&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;- PTA19/XTAL"&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;On the K60 tower board PTA19 is connected to Switch 1.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When the port is configured as GPIO input the switch value seems to be able to be read as expected. (PGPIO_PDIRA bit 0x00080000 when switch is not pressed and 0x00000000 when the switch is pressed).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Question - is there a restriction to this pin or is the user's guide at fault???&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 14 Jul 2011 16:52:26 GMT</pubDate>
    <dc:creator>mjbcswitzerland</dc:creator>
    <dc:date>2011-07-14T16:52:26Z</dc:date>
    <item>
      <title>GPIO restrictions on XTAL / EXTAL</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149758#M170</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;K60 user's manual &lt;U&gt;10.2.3 Signal Multiplexing Constraints&lt;/U&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;"The following signals have general purpose output capability only (no general purpose input):&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;- PTA18/EXTAL&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;- PTA19/XTAL"&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;On the K60 tower board PTA19 is connected to Switch 1.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When the port is configured as GPIO input the switch value seems to be able to be read as expected. (PGPIO_PDIRA bit 0x00080000 when switch is not pressed and 0x00000000 when the switch is pressed).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Question - is there a restriction to this pin or is the user's guide at fault???&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Jul 2011 16:52:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149758#M170</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2011-07-14T16:52:26Z</dc:date>
    </item>
    <item>
      <title>Re: GPIO restrictions on XTAL / EXTAL</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149759#M171</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Older revisions of the RM mention that incorrectly. The &lt;A href="http://cache.freescale.com/files/32bit/doc/ref_manual/K60P144M100SF2RM.pdf%FEFF" rel="nofollow" target="_self"&gt;lastest revision (Rev5)&lt;/A&gt; does not list that constraint.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-AMH&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jul 2011 01:57:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149759#M171</guid>
      <dc:creator>anthony_huereca</dc:creator>
      <dc:date>2011-07-15T01:57:58Z</dc:date>
    </item>
    <item>
      <title>Re: GPIO restrictions on XTAL / EXTAL</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149760#M172</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks - was still using Rev. 4 for the K60. New versions of all manuals don't mention it so assumed not an issue.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Jul 2011 18:12:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149760#M172</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2011-07-15T18:12:57Z</dc:date>
    </item>
    <item>
      <title>Re: GPIO restrictions on XTAL / EXTAL</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149761#M173</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Note that there IS an errate 3402 against PTA19 -- fights with CLKO functions if ERCLKEN is set.&amp;nbsp; I have an unconfirmed suspicion that if RANGE=0 this cross-tie is 'weak'.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 Aug 2011 00:11:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/GPIO-restrictions-on-XTAL-EXTAL/m-p/149761#M173</guid>
      <dc:creator>egoodii</dc:creator>
      <dc:date>2011-08-23T00:11:13Z</dc:date>
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