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    <title>topic Re: TWR-ADCDAC over SPI with K70F120M in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/TWR-ADCDAC-over-SPI-with-K70F120M/m-p/330765#M15486</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From LTC2600 datasheet, the K70 max. SPI speed 30MHz should works with LTC2600 (LTC2600 could support SPI speed 50MHz);&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="LTC2600 timing diagram.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50346i24973C6806D24AFD/image-size/large?v=v2&amp;amp;px=999" role="button" title="LTC2600 timing diagram.png" alt="LTC2600 timing diagram.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="LTC2600 SPI timing.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50353i72FB288DCAD8DCD1/image-size/large?v=v2&amp;amp;px=999" role="button" title="LTC2600 SPI timing.png" alt="LTC2600 SPI timing.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Delay between chars, the LTC2600 Min. is 10ns, so SPIx_CTARn[PDT] using the reset value 0b0 should be ok.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LTC2600 could support CS TO CLK delay min. 7ns, which is much smaller than K70 DSPI CS to CLK delay (K70 datasheet is about 30ns);&lt;/P&gt;&lt;P&gt;The SPIx_CTARn[PCSSCK] can keep the reset value 0b0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CLK to CS delay without related info at LTC2600, The SPIx_CTARn[PASC] keep the reset value 0b0.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 09 Feb 2015 07:38:30 GMT</pubDate>
    <dc:creator>Hui_Ma</dc:creator>
    <dc:date>2015-02-09T07:38:30Z</dc:date>
    <item>
      <title>TWR-ADCDAC over SPI with K70F120M</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/TWR-ADCDAC-over-SPI-with-K70F120M/m-p/330764#M15485</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am a bit frustrated about the documentation of the Kinetis tower and its modules. Can anyone give me advices for the SPI timing parameters needed to run the LTC2600 on TWR-ADCDAC?&lt;/P&gt;&lt;P&gt;I am using Processor Expert with MQX, since I was expecting a proper tool-driven support.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What are the correct parameters for&lt;/P&gt;&lt;P&gt;- Clock rate&lt;/P&gt;&lt;P&gt;- Delay between chars&lt;/P&gt;&lt;P&gt;- CS to CLK delay&lt;/P&gt;&lt;P&gt;- CLK to CS delay&lt;/P&gt;&lt;P&gt;?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I cannot establish a stable communication. Your help is very appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Stefan May&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Aug 2014 15:06:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/TWR-ADCDAC-over-SPI-with-K70F120M/m-p/330764#M15485</guid>
      <dc:creator>stefanmay</dc:creator>
      <dc:date>2014-08-01T15:06:55Z</dc:date>
    </item>
    <item>
      <title>Re: TWR-ADCDAC over SPI with K70F120M</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/TWR-ADCDAC-over-SPI-with-K70F120M/m-p/330765#M15486</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From LTC2600 datasheet, the K70 max. SPI speed 30MHz should works with LTC2600 (LTC2600 could support SPI speed 50MHz);&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="LTC2600 timing diagram.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50346i24973C6806D24AFD/image-size/large?v=v2&amp;amp;px=999" role="button" title="LTC2600 timing diagram.png" alt="LTC2600 timing diagram.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="LTC2600 SPI timing.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/50353i72FB288DCAD8DCD1/image-size/large?v=v2&amp;amp;px=999" role="button" title="LTC2600 SPI timing.png" alt="LTC2600 SPI timing.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Delay between chars, the LTC2600 Min. is 10ns, so SPIx_CTARn[PDT] using the reset value 0b0 should be ok.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;LTC2600 could support CS TO CLK delay min. 7ns, which is much smaller than K70 DSPI CS to CLK delay (K70 datasheet is about 30ns);&lt;/P&gt;&lt;P&gt;The SPIx_CTARn[PCSSCK] can keep the reset value 0b0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;CLK to CS delay without related info at LTC2600, The SPIx_CTARn[PASC] keep the reset value 0b0.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;best regards,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ma Hui&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Feb 2015 07:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/TWR-ADCDAC-over-SPI-with-K70F120M/m-p/330765#M15486</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2015-02-09T07:38:30Z</dc:date>
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