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    <title>topic clocking LPTMR0 in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314862#M13755</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I'm using kl14z64, when I clock the timer LPTMR0 by SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; I observe that registers related to LPTMR0_XXX are initialized with not default value (see the pictures), in particular LPTMR0_CSR gets 0xC1 so when processor experts does&amp;nbsp; NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);&amp;nbsp;&amp;nbsp;&amp;nbsp; starts a spurious interrupt.&lt;span class="lia-inline-image-display-wrapper" image-alt="lptmr0_registers.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/44698i5A1BB6718DC391EB/image-size/large?v=v2&amp;amp;px=999" role="button" title="lptmr0_registers.jpg" alt="lptmr0_registers.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Any idea?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 02 Jul 2014 07:05:49 GMT</pubDate>
    <dc:creator>stefanomanca</dc:creator>
    <dc:date>2014-07-02T07:05:49Z</dc:date>
    <item>
      <title>clocking LPTMR0</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314862#M13755</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I'm using kl14z64, when I clock the timer LPTMR0 by SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK; I observe that registers related to LPTMR0_XXX are initialized with not default value (see the pictures), in particular LPTMR0_CSR gets 0xC1 so when processor experts does&amp;nbsp; NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);&amp;nbsp;&amp;nbsp;&amp;nbsp; starts a spurious interrupt.&lt;span class="lia-inline-image-display-wrapper" image-alt="lptmr0_registers.jpg"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/44698i5A1BB6718DC391EB/image-size/large?v=v2&amp;amp;px=999" role="button" title="lptmr0_registers.jpg" alt="lptmr0_registers.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Any idea?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Jul 2014 07:05:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314862#M13755</guid>
      <dc:creator>stefanomanca</dc:creator>
      <dc:date>2014-07-02T07:05:49Z</dc:date>
    </item>
    <item>
      <title>Re: clocking LPTMR0</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314863#M13756</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;LPTMR0 registers are initialized only at Power On Reset.&amp;nbsp; This is so they can maintain time across other resets.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;The LPTMR is reset only on global Power On Reset (POR) or Low Voltage Detect&lt;/P&gt;&lt;P&gt;(LVD). When configuring the LPTMR registers, the CSR must be initially written with&lt;/P&gt;&lt;P&gt;the timer disabled, before configuring the PSR and CMR. Then, CSR[TIE] must be set as&lt;/P&gt;&lt;P&gt;the last step in the initialization. This ensures the LPTMR is configured correctly and the&lt;/P&gt;&lt;P&gt;LPTMR counter is reset to zero following a warm reset.&lt;BR /&gt;"&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Jul 2014 12:00:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314863#M13756</guid>
      <dc:creator>bobpaddock</dc:creator>
      <dc:date>2014-07-02T12:00:46Z</dc:date>
    </item>
    <item>
      <title>Re: clocking LPTMR0</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314864#M13757</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Bob, I pray you to verify on your kinetis microcontroller if when you are at power-on LPTMR0_XXX registers are reset because in my case after power-on and after the &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK&lt;/SPAN&gt; they are not zero. So something are going bad respect to the theory behavior. Anyway there is a bug in the processor expert initialization sequence. I hope in a freescale employ response.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Stefano M. &lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 02 Jul 2014 15:50:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314864#M13757</guid>
      <dc:creator>stefanomanca</dc:creator>
      <dc:date>2014-07-02T15:50:58Z</dc:date>
    </item>
    <item>
      <title>Re: clocking LPTMR0</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314865#M13758</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Stefano:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In fact I think the behavior you see is normal. To enter a debug session the MCU must be powered first (POR), and it runs enough time to configure LPTMR before you actually connect with the debugger. So the values you see are not those of Power-ON but the ones remaining after a reset by your tool (Multilink or similar).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To test this you can create a new empty project that just enables LPTMR with &lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;STRONG&gt;SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt; and check the registers. You may need to close the first programming session and open another one for the Power-ON values to take effect.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3d3d3d; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif;"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Regards!,&lt;/P&gt;&lt;P&gt;Jorge Gonzalez&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jul 2014 13:53:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314865#M13758</guid>
      <dc:creator>Jorge_Gonzalez</dc:creator>
      <dc:date>2014-07-03T13:53:00Z</dc:date>
    </item>
    <item>
      <title>Re: clocking LPTMR0</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314866#M13759</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Better do an actual power on, just to be sure.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 03 Jul 2014 18:44:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/clocking-LPTMR0/m-p/314866#M13759</guid>
      <dc:creator>galadragos</dc:creator>
      <dc:date>2014-07-03T18:44:00Z</dc:date>
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