K70 DDR Init Lock up after enabling DDR controller clock in SIM_SCGC3

pbanta — Mon, 02 Jun 2014 16:33:49 GMT

I have a new revision of our K70 board that I'm trying to bring up. So far I have no problems running MQX examples from SRAM. I'm trying to initialize the LPDDR and I'm seeing a problem I've never seen before.

I have used the K70 DDR configuration tool from here:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=K70_120&nodeId=01624698C9DE2DDDB1&fpsp=1&tab=Design_Tools_Tab

In the C function generated by the tool the first step is to enable the DDR clock gate. (Line 4 in the code snippet below.) Enabling the clock causes some problem where my PEMicro loses control of the board and the debug session is terminated.

    if ((SIM_SCGC3 & SIM_SCGC3_DDR_MASK) != SIM_SCGC3_DDR_MASK)
    {
        // Enable DDR clock gate
        SIM_SCGC3 |= SIM_SCGC3_DDR_MASK;
    }
    else
    {
        // Check to if the DRAMC is already initialized
        if ((DDR_CR00 & 1) == 1)
            return;
    }

Has anyone seen anything like this before? Any advice?

Best regards,

Paul

Re: K70 DDR Init Lock up after enabling DDR controller clock in SIM_SCGC3

pbanta — Mon, 02 Jun 2014 21:53:29 GMT

I think I found the issue. I began to think that perhaps the issue was with my debugger configuration and then I realized that with this new board and BSP that I had forgotten to change the CodeWarrior .mem file in the example code.

I'm using a hello example is from a cloned K70TWR BSP so it assumes a K70FN part. My board has a K70FX part.

The memory map for the K70FN is like this:

range      0x00000000 0x000FFFFF 4 ReadWrite    // 1024KB Code Flash
reserved   0x00100000 0x13FFFFFF
range      0x14000000 0x14003FFF 4 ReadWrite    // 16KB Programming accelleration RAM
reserved   0x14004000 0x1FFEFFFF
range      0x1FFF0000 0x1FFFFFFF 4 ReadWrite    // 64KB On chip SRAM (TCML)
range      0x20000000 0x2000FFFF 4 ReadWrite    // 64KB On chip SRAM (TCMU)
reserved   0x20010000 0x21FFFFFF
range      0x22000000 0x221FFFFF 4 ReadWrite    // Aliased to TCMU SRAM bitband
reserved   0x22200000 0x3FFFFFFF
reserved   0x60000000 0x6FFFFFFF                // Flexbus for external memory
range      0x70000000 0x77FFFFFF 4 ReadWrite    // DDR2
reserved   0x78000000 0xDFFFFFFF                // Flexbus for external memory
reserved   0xE0100000 0xFFFFFFFF

The memory map for the K70FX is like this:

range      0x00000000 0x0007FFFF 4 ReadWrite    // 512KB Code Flash
reserved   0x00080000 0x0FFFFFFF
range      0x10000000 0x1007FFFF 4 ReadWrite    // 512KB Data Flash
reserved   0x10080000 0x13FFFFFF
range      0x14000000 0x14003FFF 4 ReadWrite    // 16KB Programming accelleration RAM
reserved   0x14004000 0x1FFEFFFF
range      0x1FFF0000 0x1FFFFFFF 4 ReadWrite    // 64KB On chip SRAM (TCML)
range      0x20000000 0x2000FFFF 4 ReadWrite    // 64KB On chip SRAM (TCMU)
reserved   0x20010000 0x21FFFFFF
range      0x22000000 0x221FFFFF 4 ReadWrite    // Aliased to TCMU SRAM bitband
reserved   0x22200000 0x3FFFFFFF
reserved   0x60000000 0x6FFFFFFF                // Flexbus for external memory
range      0x70000000 0x7FFFFFFF 4 ReadWrite    // DRAM Controller - Write-back
range      0x80000000 0x8FFFFFFF 4 ReadWrite    // DRAM Controller - Write-through
reserved   0x90000000 0xDFFFFFFF                // Flexbus for external memory
reserved   0xE0100000 0xFFFFFFFF

I made this change. Recompiled the world and the problem went away.

topic Re: K70 DDR Init Lock up after enabling DDR controller clock in SIM_SCGC3 in Kinetis Microcontrollers

K70 DDR Init Lock up after enabling DDR controller clock in SIM_SCGC3

Re: K70 DDR Init Lock up after enabling DDR controller clock in SIM_SCGC3