LPTMR0 interrupts

vinkar — Thu, 13 Mar 2014 16:49:19 GMT

Hello ,

This is basically an ISR doubt.

I am trying to interrupt when there is a timer overflow.

But, it never goes to the ISR. Kindly suggest some solutions pls -

#include "derivative.h" /* include peripheral declarations */

//void UART0_IRQHandler(void);

//extern void LPTimer_IRQ(void);

int main(void)

{

int count;

uint16_t countTemp = 0;

asm(" CPSIE i");

//asm volatile ("cpsie i");

SIM_SOPT1 = 0;

SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);//PORTC_PCR1 |= PORT_PCR_MUX(1);//select RTC_CLKIN function

PORTB_PCR8 |= 0x00000100; // alternative pin mux selection //

GPIOB_PDDR |= 0x00000100; // pin direction //

NVIC_ICPR = 1 << (28);

NVIC_ISER = 1 << (28);

SIM_SCGC5|=SIM_SCGC5_LPTMR_MASK;

/* Reset LPTMR settings */

SIM_SOPT1 = 0;

SIM_SCGC5 |= (SIM_SCGC5_LPTMR_MASK | SIM_SCGC5_PORTB_MASK);//PORTC_PCR1 |= PORT_PCR_MUX(1);//select RTC_CLKIN function

LPTMR0_CSR=0;

LPTMR0_CSR |= 0x00000040;

/* Set the compare value to the number of ms to delay */

LPTMR0_CMR = 600;

/* Start the timer */

LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;

/* Wait for counter to reach compare value */

while(1){

}

void LPTimer_IRQHandler(void){

//while (!(LPTMR0_CSR & LPTMR_CSR_TCF_MASK));

/* Disable counter and Clear Timer Compare Flag */

LPTMR0_CSR &= ~LPTMR_CSR_TEN_MASK;

LPTMR0_CSR |= LPTMR_CSR_TCF_MASK;

GPIOB_PTOR |= (1<<8);

LPTMR0_CSR |= LPTMR_CSR_TEN_MASK;

}

void enable_irq (int irq)

{

//int div;

/* Determine which of the NVICISERs corresponds to the irq */

// div = irq/32;

//NVICICPR0 = 1 << (irq);

switch (irq)

{

case 0x0:

NVICICPR0 = 1 << (irq);

NVICISER0 = 1 << (irq%32);

break;

case 0x1:

NVICICPR1 = 1 << (irq%32);

NVICISER1 = 1 << (irq%32);

break;

case 0x2:

NVICICPR2 = 1 << (irq%32);

NVICISER2 = 1 << (irq%32);

break;

}

//}*/

Re: LPTMR0 interrupts

xiaodong_zhang — Fri, 14 Mar 2014 02:46:17 GMT

hi karuvat,

I guess you miss TCF bit of LPTMR0_CSR. You can refer to the following.

topic Re: LPTMR0 interrupts in Kinetis Microcontrollers

LPTMR0 interrupts

Re: LPTMR0 interrupts