topic Re: BIST K10 m4 in Kinetis Microcontrollers

BIST K10 m4

mrandreas — Fri, 09 May 2014 11:20:29 GMT

Hi,

Is there any BIST library or code for RAM walk 1 and lineaddress, stack\heap CPU test for k10, arm M4 k and series in general?

thanks

Andreas

Re: BIST K10 m4

LuisCasado — Fri, 09 May 2014 11:43:49 GMT

Hi,

Have a look at the IEC60730 Safety routines for Cortex M4:

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=APIEC60730&fsrch=1&sr=1&pageNum=1

Luis

Re: BIST K10 m4

mrandreas — Mon, 12 May 2014 08:20:09 GMT

Thanks Luis,

I've downloaded the DSC Safety Routines 1.0 and Safety Household routines. I'm however unable to download S08 Routines for class B IEC60730. Last week I've register an local distributer FEA for the sw download request, but it has not been aprooved yet. I suspect that the request reached an deadend. Is it posisble to download the lib from another place?

IEC60730B_S08_SAFTY_CLASSB_LIB : S08 Routines for class B IEC60730.

Andreas

Re: BIST K10 m4

perlam_i_au — Mon, 12 May 2014 21:27:29 GMT

In this case I suggest you to create a service request and mention the name of your FEA in order to know what happened.

Have a nice day,
Perla Moncada

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Re: BIST K10 m4

egoodii — Thu, 15 May 2014 14:31:47 GMT

I would like to post some 'caveats' about the Cortex M4 BIST routines.

FIrstly, as you might imagine, the routines are NOT 'compiler subroutine-call-friendly', in that they don't preserve ANY scratchpad registers. So I have to surround the calls with 'manual' register save/restore:

//Complete test of core register set for CORTEX M4

asm(" PUSH.W {R4-R12, LR}");

asm(" POP.W {R4-R12, LR}");

Secondly, the CPU test routines do NOT leave the CPU controls in their default power-on state. Most specifically, I find I must return these three registers to 'zero' to restore 'normal' interrupt operation:

__set_PRIMASK( 0 ); //Restore these items 'munged' by the test!

__set_BASEPRI( 0 );

__set_FAULTMASK( 0 );

The RAM test isn't quite so easy, since it wants to over-write all of RAM. But even changing the configuration for the 'end of RAM' to carve out some stack space, I am still in a condition that for some reason hangs-up in clock initialization if I allow the RAM tests to run due to some continued confusion in the compiler about 'retained' register contents.

Re: BIST K10 m4

mrandreas — Thu, 22 May 2014 08:32:16 GMT

Hi Earl, thanks for the input.

I hope to run these test's in my boot Application (c++ keil). I haven't started poking in the task quite yet. I'm nok sure which of the available downloads to start experimenting with. I have been able to download Safe Routines 1.0 and the household routines, but neither me or my FEA contact haven't been able to download the safty classb_lib or the zip that comes With the AN4873. Not sure what I'm missing out, compared to what I have been able to download.

Andreas