<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Erroneous interrupt generated when enabling LPTMR0 on FRDM-KL25Z board in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292995#M11867</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you also tried to set the ICPR register before writing to ISER? This is used to avoid some unexcepted interrupt .&lt;/P&gt;&lt;P&gt;Please kindly refer to the following example for referenece.&lt;/P&gt;&lt;P&gt;void enable_irq (int irq)&lt;/P&gt;&lt;P&gt;{&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Make sure that the IRQ is an allowable number. Up to 32 is &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * used.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * NOTE: If you are using the interrupt definitions from the header&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * file, you MUST SUBTRACT 16!!!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (irq &amp;gt; 32)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printf("\nERR! Invalid IRQ value passed to enable irq function!\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set the ICPR and ISER registers accordingly */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_ICPR |= 1 &amp;lt;&amp;lt; (irq%32);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_ISER |= 1 &amp;lt;&amp;lt; (irq%32);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 17 Jun 2013 07:05:18 GMT</pubDate>
    <dc:creator>Kan_Li</dc:creator>
    <dc:date>2013-06-17T07:05:18Z</dc:date>
    <item>
      <title>Erroneous interrupt generated when enabling LPTMR0 on FRDM-KL25Z board</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292994#M11866</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I´m trying to substitute my RTOS tick timer from the ARM systick to the LPTMR0 timer, in order to get better low power mode support.&lt;/P&gt;&lt;P&gt;However, when the code enables the LPTMR0 interrupt by the NVIC_ISER register, an erroneous interrupt is generated. The code that do that is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NVIC_ISER |= NVIC_EN0_INT28; (on CoIDE)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;or &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Common initialization of the CPU registers */&amp;nbsp;&amp;nbsp;&amp;nbsp; (on CodeWarrior 10.4)&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* NVIC_ISER: SETENA|=0x10000000 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The interrupt is generated as soon the LPTMR0 bit is set in NVIC_ISER register. The code that follows that lines is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* NVIC_IPR7: PRI_28=0xC0 */&lt;/P&gt;&lt;P&gt;NVIC_IPR7 = (uint32_t)((NVIC_IPR7 &amp;amp; (uint32_t)~(uint32_t)(&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_IP_PRI_28(0x3F)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; )) | (uint32_t)(&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_IP_PRI_28(0xC0)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ));&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* SIM_SCGC5: LPTMR=1 */&lt;/P&gt;&lt;P&gt;SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;&lt;/P&gt;&lt;P&gt;/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */&lt;/P&gt;&lt;P&gt;LPTMR0_CSR = LPTMR_CSR_TPS(0x00);&lt;/P&gt;&lt;P&gt;/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0 */&lt;/P&gt;&lt;P&gt;LPTMR0_CMR = LPTMR_CMR_COMPARE(module);&lt;/P&gt;&lt;P&gt;/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */&lt;/P&gt;&lt;P&gt;LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00));&lt;/P&gt;&lt;P&gt;/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=0,PBYP=1,PCS=1 */&lt;/P&gt;&lt;P&gt;LPTMR0_PSR = LPTMR_PSR_PRESCALE(0x00) |&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPTMR_PSR_PBYP_MASK |&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPTMR_PSR_PCS(0x01);&lt;/P&gt;&lt;P&gt;/* LPTMR0_CSR: TCF=0,TEN=1 */&lt;/P&gt;&lt;P&gt;LPTMR0_CSR = (uint32_t)((LPTMR0_CSR &amp;amp; (uint32_t)~(uint32_t)(&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPTMR_CSR_TCF_MASK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; )) | (uint32_t)(&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPTMR_CSR_TEN_MASK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ));&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The problem is that I do not want the interruption to be generated before the system starts. Why this interrupt is being generated even before the LPTMR0 clock is enabled?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help will be appreciated.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Gustavo&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 16 Jun 2013 03:28:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292994#M11866</guid>
      <dc:creator>gustavod</dc:creator>
      <dc:date>2013-06-16T03:28:50Z</dc:date>
    </item>
    <item>
      <title>Re: Erroneous interrupt generated when enabling LPTMR0 on FRDM-KL25Z board</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292995#M11867</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Have you also tried to set the ICPR register before writing to ISER? This is used to avoid some unexcepted interrupt .&lt;/P&gt;&lt;P&gt;Please kindly refer to the following example for referenece.&lt;/P&gt;&lt;P&gt;void enable_irq (int irq)&lt;/P&gt;&lt;P&gt;{&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Make sure that the IRQ is an allowable number. Up to 32 is &lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * used.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * NOTE: If you are using the interrupt definitions from the header&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * file, you MUST SUBTRACT 16!!!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (irq &amp;gt; 32)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; printf("\nERR! Invalid IRQ value passed to enable irq function!\n");&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set the ICPR and ISER registers accordingly */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_ICPR |= 1 &amp;lt;&amp;lt; (irq%32);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_ISER |= 1 &amp;lt;&amp;lt; (irq%32);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="mce_paste_marker"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Jun 2013 07:05:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292995#M11867</guid>
      <dc:creator>Kan_Li</dc:creator>
      <dc:date>2013-06-17T07:05:18Z</dc:date>
    </item>
    <item>
      <title>Re: Erroneous interrupt generated when enabling LPTMR0 on FRDM-KL25Z board</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292996#M11868</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Kan,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for remember me that. I completely forgot that there is a register to clear pending interrupts.&lt;/P&gt;&lt;P&gt;The code you posted solved the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Gustavo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Jun 2013 17:23:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Erroneous-interrupt-generated-when-enabling-LPTMR0-on-FRDM-KL25Z/m-p/292996#M11868</guid>
      <dc:creator>gustavod</dc:creator>
      <dc:date>2013-06-17T17:23:34Z</dc:date>
    </item>
  </channel>
</rss>

