topic Re: Problem for FlexCAN in Kinetis Microcontrollers

Problem for FlexCAN

AaronsCook — Tue, 19 Nov 2013 08:38:40 GMT

Hi, all

When I use the flexCAN of K60Dx512, I encounter a problem that make me crazy.

Firstly, I set the flexCAN as global masking

canx->MCR &= ~CAN_MCR_IRMQ_MASK; //global

And then I use two MCU as TX & RX.

The ID is 29bits extension.

In the TX MCU I use one MSG object as TX mode and set the 29bits, 8 bytes;

In another RX MCU I use one MSG object as RX mode and set the same 29bits ID;

When I begin to send message, I can use oscilloscope to get signal from the can bus. But the RX terminal can't receive message which I use interrupt to get message.

I set break point in the Interrupt code in order to use debug to trace it. But it doesn't stop on the break point.

So I change the flexCAN as individual masking.

canx->MCR |= CAN_MCR_IRMQ_MASK; //individual

I also use two MCU testing just like above.

This time the RX terminal can receive message but it can't receive continuously when the TX send continuously.

It seem to lost message and I set the baud as 500kps.

this is Initiate function for flexCAN

void initcan()

{

OSC->CR |= OSC_CR_ERCLKEN_MASK | OSC_CR_EREFSTEN_MASK;

SIM->SCGC6 |= SIM_SCGC6_FLEXCAN0_MASK;

canx->MCR |= CAN_MCR_MDIS_MASK;

canx->CTRL1 |= CAN_CTRL1_CLKSRC_MASK;

canx->MCR |= CAN_MCR_HALT_MASK;

canx->MCR |= CAN_MCR_FRZ_MASK;

canx->MCR &= ~CAN_MCR_MDIS_MASK;

while(!(canx->MCR & CAN_MCR_LPMACK_MASK));

canx->MCR ^= CAN_MCR_SOFTRST_MASK;

while(canx->MCR & CAN_MCR_SOFTRST_MASK);

while(!(canx->MCR & CAN_MCR_FRZACK_MASK));

if(mask_mode == CAN_MSGOBJ_GLOBAL_MASKING)

{

canx->MCR &= ~CAN_MCR_IRMQ_MASK;

}

else

{

canx->MCR |= CAN_MCR_IRMQ_MASK;

}

canx->MCR |= CAN_MCR_SUPV_MASK ;

canx->MCR |= CAN_MCR_SRXDIS_MASK ;

canx->MCR &= ~CAN_MCR_WRNEN_MASK;

canx->MCR &= ~CAN_MCR_RFEN_MASK ;

canx->MCR &= ~CAN_MCR_AEN_MASK;

canx->MCR &= ~CAN_MCR_LPRIOEN_MASK;

canx->CTRL2 |= CAN_CTRL2_EACEN_MASK;

canx->CTRL2 &= ~CAN_CTRL2_RRS_MASK;

canx->CTRL2 |= CAN_CTRL2_MRP_MASK;

//canx->CTRL1 |= CAN_CTRL1_LBUF_MASK;

canx->CTRL1 &= ~CAN_CTRL1_LBUF_MASK;

//canx->CTRL1 |= CAN_CTRL1_LPB_MASK; //loop

canx->CTRL1 &= ~CAN_CTRL1_LPB_MASK;

//set baud

	prescale = CAN_GET_PRESCALE(g_bus_clock,baud,20);
	//
	canx->CTRL1 \|= CAN_CTRL1_RJW(2)
	\| CAN_CTRL1_PROPSEG(6)
	\| CAN_CTRL1_PSEG1(6)
	\| CAN_CTRL1_PSEG2(4)
	\| CAN_CTRL1_PRESDIV(prescale);

canx->TIMER = 0x0000;

for(i = 0;i < MSG_MAX_NO; i++)

{

canx->MB[i].CS = 0x00000000;

canx->MB[i].ID = 0x00000000;

canx->MB[i].WORD0 = 0x00000000;

canx->MB[i].WORD1 = 0x00000000;

}

canx->IFLAG1 = 0xFFFFFFFF;

canx->IFLAG2 = 0xFFFFFFFF;

canx->IMASK1 = 0x00000000;

canx->IMASK2 = 0x00000000;

for(i = 0;i < MSG_MAX_NO; i++)

{

canx->RXIMR[i] = 0x1FFFFFFF;

}

canx->RXMGMASK = 0x1FFFFFFF;

canx->RX14MASK = 0x1FFFFFFF;

canx->RX15MASK = 0x1FFFFFFF;

canx->MCR &= ~CAN_MCR_FRZ_MASK;

while( canx->MCR & CAN_MCR_FRZACK_MASK);

canx->MCR &= ~(CAN_MCR_HALT_MASK);

while( canx->MCR & CAN_MCR_NOTRDY_MASK);

canx->MCR &= ~CAN_MCR_MDIS_MASK;

}

this my send function

void send(.......)

{

if( CAN_GetMsgCode(canx_ptr,msg_num_temp) != CAN_MSGOBJ_TX_UNCONDITIONAL)

{

//CODE INACTIVE

canx_ptr->MB[msg_num_temp].CS |= CAN_MB_CS_CODE(CAN_MSGOBJ_TX_INACTIVE);

//ID

CAN_SetMsgID(canx_ptr,msg_num_temp,message_id);

//Msg data

CAN_WriteData(canx_ptr,msg_num_temp,in_data_length,in_data_buffer);

//Msg length

CAN_SetMsgLength(canx_ptr,msg_num_temp,in_data_length);

//Msg CODE TX_UNCONDITIONAL wait to send

canx_ptr->MB[msg_num_temp].CS |= CAN_MB_CS_CODE(CAN_MSGOBJ_TX_UNCONDITIONAL);

}}

this my receive funtion

void receive(....)

{

message_code = CAN_GetMsgCode(canx,msg_num);

if ((message_code != CAN_MSGOBJ_RX_BUSY) &&

(message_code != CAN_MSGOBJ_RX_OVERRUN))

{

//ID

msg_id = LPLD_CAN_GetMsgID(canx, msg_num);

//read Msg len

data_length = (uint8_t)LPLD_CAN_GetMsgLength(canx, msg_num);

//read data

CAN_GetData(canx, msg_num,data_length,rx_data);

//get time stamp

time_stamp = LPLD_CAN_GetMsgTimeStamp(canx, msg_num);

for(i = data_length; i < 8; i++)

{

rx_data[i] = 0;

}

//save data to can_rx_msg

can_rx_msg->CAN_MsgID = msg_id;

can_rx_msg->CAN_MsgDataLength = data_length;

can_rx_msg->CAN_MsgTimeStamp = time_stamp;

memcpy(can_rx_msg->CAN_MsgDataBuffer,rx_data,data_length);

//unlock msg

timer = CAN_UnlockMsg(canx);

CAN_Interrupt_ClearPending(canx,msg_num);

//write code to empty msg

CAN_SetMsgCode(canx,msg_num,CAN_MSGOBJ_RX_EMPTY);

}

thank you

Best Regards

Laplenden

Re: Problem for FlexCAN

Hui_Ma — Wed, 20 Nov 2013 02:35:34 GMT

Hi Laplenden,

I am checking this issue. I will let you know when I could get any updated info.

Thank you for the patience.

B.R.

Ma Hui

Re: Problem for FlexCAN

AaronsCook — Wed, 20 Nov 2013 03:06:42 GMT

Thanks

B.R.

Laplenden

Re: Problem for FlexCAN

Hui_Ma — Wed, 20 Nov 2013 06:28:01 GMT

Hi Laplenden,

I would recommend to refer FlexCAN example of K60 from attached.

Please read below info before start two CAN nodes communications:

This project is a simple can_loopback_node example. It requires at least two CAN nodes:

Node A is running sci2can or any other CAN application with internal loopback disabled;

Node B is running can_loopback_node code.

The example echoes all messages to the remote node (Node A).

The default CAN bit rate is 83.33K.

By default the serial port on the tower serial card is used for

the terminal output. The terminal should be configured for 115200 8-N-1.

Supported platforms:

- TWR_K40X256

- TWR_K60N512

The can_loopback_node.eww file will open the project for all of the supported platforms.

Pick the specific project that corresponds to your hardware.

NOTE: if switching between platforms it is a good idea to do a make clean to make sure the code

is properly configured for the new platform.

Instructions on how to play with sci2can node (Node A):

1) Open sci2can.eww workspace, and change both FLEXCAN_SELF_RECEPTION and FLEXCAN_LOOP_BACK macro values to 0 in can_config.h as below:

#define FLEXCAN_SELF_RECEPTION 0

#define FLEXCAN_LOOP_BACK 0

2) Select "FLASH_256KB_PFLASH_256KB_DFLASH" as the active configuration for the project;

3) Rebuild the whole project;

4) Select "Project->download and debug";

5) Select "Debug->Go" to run the code;

6) Switch off the power to the tower system Node A and disconnect the JTAG connection from the emulator and PC to the Node A;

7) Connect one end of the CAN cable to J7 on TWR-SER module of the Node A tower system ,

the other end to the J7 on another set of TWR-SER module of K40 or K60 tower system (Node B);

8) Connect JTAG connector from the emulator to the tower system Node B and PC;

9) switch on the power to the tower system Node B;

10) open can_loopback_node workspace by double-clicking on can_loopback_node.eww

11) Select "FLASH_256KB_PFLASH_256KB_DFLASH" as the active configuration for the project;

12) Rebuild the whole project and then select "Project->download & debug";

13) Select "Debug->Go" to run the code on the tower system Node B;

14) switch on the power to the tower system Node A to run sci2can demo;

15) follow aforementioned instructions to play with sci2can demo;

Wish it helps.

Re: Problem for FlexCAN

AaronsCook — Wed, 20 Nov 2013 06:38:26 GMT

I will study this code carefully and test the function.

Thanks

B.R.

laplenden

Re: Problem for FlexCAN

AaronsCook — Thu, 02 Jan 2014 13:42:43 GMT

Hello,Hui_Ma

I test the code KINETIS_SC_100MHz's FlexCAN demo. It's perform great!

I have a question about the code.

Question:

the demo has used bus clock as the source of CAN

pFlexCANReg->CTRL1 |= FLEXCAN_CTRL_CLK_SRC;

However,why dose it use "pFlexCANReg->CTRL1 = 0 | ....." to clear the FLEXCAN_CTRL_CLK_SRC bit?

	if(pFlexCANReg->CTRL1 & FLEXCAN_CTRL_CLK_SRC)
	{
	/*
	** 48M/120= 400k sclock, 12Tq
	** PROPSEG = 3, LOM = 0x0, LBUF = 0x0, TSYNC = 0x0, SAMP = 1
	** RJW = 3, PSEG1 = 4, PSEG2 = 4,PRESDIV = 120
	*/
	pFlexCANReg->CTRL1 = (0 \| FLEXCAN_CTRL_PROPSEG(2) \| FLEXCAN_CTRL_RJW(2)
	\| FLEXCAN_CTRL_PSEG1(3) \| FLEXCAN_CTRL_PSEG2(3)
	\| FLEXCAN_CTRL_PRESDIV(119));
	}

Thank you very much

Aaron

Re: Problem for FlexCAN

Hui_Ma — Fri, 03 Jan 2014 02:38:36 GMT

The CANx_CTRL1 register [CLKSRC] bit can only be written in Disable mode as it is blocked by hardware in other modes.

And you will find in <can.c> file line 128 with below code to exit the Disable mode (Exit from this mode is done by negating the MDIS bit in the MCR Register.):

// Enable CAN module

pFlexCANReg->MCR |= FLEXCAN_MCR_FRZ; // enable HALT feature

pFlexCANReg->MCR &= ~FLEXCAN_MCR_MDIS;

So the code in configure bit rate does not modify CANx_CTRL1 register [CLKSRC] bit.

Wish it helps.

Re: Problem for FlexCAN

AaronsCook — Fri, 03 Jan 2014 03:27:15 GMT

Hi,

Oh I see.

Thank you very much.

Best Regards

Aaron

Re: Problem for FlexCAN

AaronsCook — Fri, 03 Jan 2014 15:17:56 GMT

Hi, Hui_Ma

When I test the CAN in the debug mode, it away report the CAN error which include Bit1 error,Bit0 error,Form error,and Stuffing error.

I open the CAN error, CAN bus off, Tx & Rx Waring interrupt in the CTL1 and Set break-point in the code.

Then I find that when I finish initialize the CAN, it will generate CAN error interrupt.

In addition, I clear the bit in ESR1 in the coed but it always generate CAN error interrupt because it always has Bit1 error,Bit0 error,Form error,and Stuffing error. I feel it can't clear the error, it always be set.

I don't know if these errors has bad effect on the data transfer on the CAN bus?

But now I feel I always lost message when use the MB interrupt-receive mode in these condition.

May be the poll-receive mode is better than interrupt-receive mode?

This the test picture.

Please kindly help me analysis the bug. Thank you very much.

Best Regards

Aaron

Re: Problem for FlexCAN

Hui_Ma — Mon, 06 Jan 2014 08:33:40 GMT

I think that could caused by the CAN node with different baud rate and bit rate. Customer need to check the baud rate setting and bit timing setting.

Wish it helps.

Re: Problem for FlexCAN

sruthyuk — Tue, 06 Oct 2015 05:38:15 GMT

Hi friend,

I test the can_loopback_code KINETIS_SC_100MHz's FlexCAN demo.I tried to change the code by writing the CAN first using UART5 and then reading it to check the transmitted character in the consoleflexcan testing in TWR-K60F120M.Here i have used PTA13/12 for FlexCAN0 by connecting TXD and RXD pins in TWR-K60F120M tower module.But the code is not working at all.What may be the reason??

Best Regards,

sruthy uk

Re: Problem for FlexCAN

Hui_Ma — Thu, 08 Oct 2015 09:00:05 GMT

Hi,

For the can_loopback_code KINETIS_SC_100MHz's FlexCAN demo is based on Kinetis_100MHz product family, it need to modify related setting, such as MCG setting to make the FlexCAN module works.

Please download the Kinetis 120MHz bare metal sample code from here and use that <make_new_ project> batch to create an platform project to develop related FlexCAN application.

Wish it helps.

Have a great day,
Ma Hui

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Re: Problem for FlexCAN

sruthyuk — Thu, 08 Oct 2015 12:07:08 GMT

Hi,

Whether i can do the flexcan testing in the KDS project itself??What modifications had to be done in the can_loopback_code KINETIS_SC_100MHz's

FlexCAN demo to test the CAN??Is there MCG settings provided in any of the code files in can_loopback project??

Best Regards,

sruthy uk

Re: Problem for FlexCAN

sruthyuk — Mon, 09 Nov 2015 09:06:10 GMT

Hi,

i tested can loopback mode and its working fine.how can i test can communication between two can nodes in two different tower board???

with regards,

sruthy uk

Re: Problem for FlexCAN

Hui_Ma — Tue, 10 Nov 2015 08:14:45 GMT

Hi,

The FlexCAN module's Loop-Back mode:

The module enters this mode when the LPB field in the Control 1 Register is asserted. In this mode, FlexCAN performs an internal loop back that can be used for self-test operation. The bit stream output of the transmitter is internally fed back to the receiver input. The Rx CAN input pin is ignored and the Tx CAN output goes to

the recessive state (logic '1'). FlexCAN behaves as it normally does when transmitting and treats its own transmitted message as a message received from a remote node. In this mode, FlexCAN ignores the bit sent during the ACK slot in the CAN frame acknowledge field to ensure proper reception of its own message. Both transmit and receive interrupts are generated.

There doesn't need to connect CAN TXD with RXD pin, which is internal loop back .

The reference code, please check my previous thread answer attached K60_100MHz source code, which using the same FlexCAN module with K60_120MHz product.

Wish it helps.

Have a great day,
Ma Hui

Re: Problem for FlexCAN

sruthyuk — Sat, 05 Dec 2015 15:41:20 GMT

Is there any sample code to refer me for testing two CAN module communication?? Here I have already tested both CAN0 & CAN1 modules in TWR-K60F120M using loopback mode and its working fine.Now i am trying to test communication between these CAN modules like CAN0 used for transmitting data and CAN1 for receiving that data.

with regards

sruthy uk

Re: Problem for FlexCAN

sruthyuk — Tue, 15 Mar 2016 09:23:12 GMT

hi,

While i tried to test CAN in loopback mode both the transmit and receive interrupts are generated and routines were executed. But when i tested CAN networks by connecting two CAN nodes interrupt routines are not executing even if the IMASK bit is enabled for message buffer. How can i test the interrupt routines??

with regards,

sruthy uk

Re: Problem for FlexCAN

egoodii — Tue, 15 Mar 2016 18:15:51 GMT

I might guess you don't have a 'net 60 ohms' between the CAN differential wires from the transceivers on the two now-interconnected-nodes?

Re: Problem for FlexCAN

sruthyuk — Wed, 16 Mar 2016 04:30:46 GMT

hi,

Yes you r right.i am not using any net 60 ohm across these bus lines.What is the purpose for using it?? i have attached the schematic of transceiver circuit. For testing communication between two CAN nodes i interconnected CANH pins and CANL pins of both transceivers.Also i can view the transmitted signals from CAN0 on Receiver pin of second transceiver in CAN1 for reception.But still CAN1 interrupt is not working.

Best regards,

sruthy uk

Re: Problem for FlexCAN

egoodii — Wed, 16 Mar 2016 12:22:54 GMT

In one sense the 'ideal bus' is 120ohms, terminated at both ends with such 120ohms, as a 'true transmission line'. BUT more importantly for CAN, the drivers are 'open collector/emitter' and can only create a + differential voltage in what is called the 'dominant' state, and the RETURN to 'near 0V differential' for the 'recessive state' is supplied ENTIRELY by said resistors. The net resistance MUST be there, although for a 'short collection of wires' (<2m overall for 250Kb/s) it can just be one 50 to 70 ohm resistance 'anywhere'.