<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: Watchdog LPO in Kinetis Microcontrollers</title>
    <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281367#M10433</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Martin&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the patience.&lt;/P&gt;&lt;P&gt;I do a test based on TWR-K60D100M board with mask set 2N22D. &lt;/P&gt;&lt;P&gt;I use below test code to set WDOG clock source is LPO and it works as expected.&lt;/P&gt;&lt;P&gt;Please check my test code below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void test_wdog_lpo(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; wdog_unlock();&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* WDOG_TOVALH: TOVALHIGH=0x0C00 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_TOVALH = 0x0; /* Setup time-out value register high */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_TOVALL: TOVALLOW=2 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_TOVALL = 0x270F; /* Setup time-out value register low */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_PRESC: ??=0,??=0,??=0,??=0,??=0,PRESCVAL=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_PRESC = WDOG_PRESC_PRESCVAL(0x00); /* Setup status register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_STCTRLL: INTFLG=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=1 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_STCTRLL = (WDOG_STCTRLL_INTFLG_MASK | 0x01U); /* Setup status register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_STCTRLH: ??=0,DISTESTWDOG=1,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,??=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=0,WINEN=0,IRQRSTEN=1,CLKSRC=1,WDOGEN=1 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_STCTRLH = 0x1F1;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void wdog_unlock(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* NOTE: DO NOT SINGLE STEP THROUGH THIS FUNCTION!!! */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* There are timing requirements for the execution of the unlock. If&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; * you single step through the code you will cause the CPU to reset.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* This sequence must execute within 20 clock cycles, so disable&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * interrupts will keep the code atomic and ensure the timing.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DisableInterrupts;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Write 0xC520 to the unlock register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_UNLOCK = 0xC520;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Followed by 0xD928 to complete the unlock */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_UNLOCK = 0xD928;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Re-enable interrupts now that we are done */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; EnableInterrupts;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I use below code to refresh the WDOG:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Write 0xA602 to the refresh register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_REFRESH = 0xA602;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; /* Followed by 0xB480 to complete the refresh */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_REFRESH = 0xB480;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Without refresh WDOG, it will generate chip reset every 10 seconds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 03 Sep 2013 09:00:50 GMT</pubDate>
    <dc:creator>Hui_Ma</dc:creator>
    <dc:date>2013-09-03T09:00:50Z</dc:date>
    <item>
      <title>Watchdog LPO</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281365#M10431</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I configured watchdog to run from LPO clock source on MK20DN512VLL10. However, I get watchdog reset everytime when the configured watchdog timeout passes, despite of refreshing the watchdog.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When I change the watchdog to run from BUS clock, it behaves as expected&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Are there any precautions when running watchdog from LPO?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Aug 2013 10:40:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281365#M10431</guid>
      <dc:creator>martindusek</dc:creator>
      <dc:date>2013-08-29T10:40:11Z</dc:date>
    </item>
    <item>
      <title>Re: Watchdog LPO</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281366#M10432</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Martin,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am checking with this issue, I will be back when I could get any updated info.&lt;/P&gt;&lt;P&gt;Thank you for the patience.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;B.R.&lt;/P&gt;&lt;P&gt;Ma Hui&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Sep 2013 06:49:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281366#M10432</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2013-09-03T06:49:06Z</dc:date>
    </item>
    <item>
      <title>Re: Watchdog LPO</title>
      <link>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281367#M10433</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Martin&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the patience.&lt;/P&gt;&lt;P&gt;I do a test based on TWR-K60D100M board with mask set 2N22D. &lt;/P&gt;&lt;P&gt;I use below test code to set WDOG clock source is LPO and it works as expected.&lt;/P&gt;&lt;P&gt;Please check my test code below:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void test_wdog_lpo(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; wdog_unlock();&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* WDOG_TOVALH: TOVALHIGH=0x0C00 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_TOVALH = 0x0; /* Setup time-out value register high */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_TOVALL: TOVALLOW=2 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_TOVALL = 0x270F; /* Setup time-out value register low */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_PRESC: ??=0,??=0,??=0,??=0,??=0,PRESCVAL=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_PRESC = WDOG_PRESC_PRESCVAL(0x00); /* Setup status register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_STCTRLL: INTFLG=1,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=1 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_STCTRLL = (WDOG_STCTRLL_INTFLG_MASK | 0x01U); /* Setup status register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* WDOG_STCTRLH: ??=0,DISTESTWDOG=1,BYTESEL=0,TESTSEL=0,TESTWDOG=0,??=0,??=1,WAITEN=1,STOPEN=1,DBGEN=0,ALLOWUPDATE=0,WINEN=0,IRQRSTEN=1,CLKSRC=1,WDOGEN=1 */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_STCTRLH = 0x1F1;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void wdog_unlock(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* NOTE: DO NOT SINGLE STEP THROUGH THIS FUNCTION!!! */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* There are timing requirements for the execution of the unlock. If&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; * you single step through the code you will cause the CPU to reset.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* This sequence must execute within 20 clock cycles, so disable&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; * interrupts will keep the code atomic and ensure the timing.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; DisableInterrupts;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Write 0xC520 to the unlock register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_UNLOCK = 0xC520;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Followed by 0xD928 to complete the unlock */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_UNLOCK = 0xD928;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; /* Re-enable interrupts now that we are done */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; EnableInterrupts;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I use below code to refresh the WDOG:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Write 0xA602 to the refresh register */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_REFRESH = 0xA602;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; /* Followed by 0xB480 to complete the refresh */&lt;/P&gt;&lt;P&gt;&amp;nbsp; WDOG_REFRESH = 0xB480;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Without refresh WDOG, it will generate chip reset every 10 seconds.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Sep 2013 09:00:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Kinetis-Microcontrollers/Watchdog-LPO/m-p/281367#M10433</guid>
      <dc:creator>Hui_Ma</dc:creator>
      <dc:date>2013-09-03T09:00:50Z</dc:date>
    </item>
  </channel>
</rss>

